From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1D4DC433F5 for ; Mon, 15 Nov 2021 19:09:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 872EE6325E for ; Mon, 15 Nov 2021 19:09:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 872EE6325E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B6E9B6E079; Mon, 15 Nov 2021 19:09:24 +0000 (UTC) Received: from aposti.net (aposti.net [89.234.176.197]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7828D6E079 for ; Mon, 15 Nov 2021 19:09:23 +0000 (UTC) Date: Mon, 15 Nov 2021 19:09:07 +0000 From: Paul Cercueil Subject: Re: [PATCH v6 1/8] drm/ingenic: prepare ingenic drm for later addition of JZ4780 To: "H. Nikolaus Schaller" Message-Id: <7VNM2R.1CHJIFHQDLSS@crapouillou.net> In-Reply-To: <122791473d61add6992310cec267ffde2607a2df.1636573413.git.hns@goldelico.com> References: <122791473d61add6992310cec267ffde2607a2df.1636573413.git.hns@goldelico.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: quoted-printable X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Paul Boddie , Geert Uytterhoeven , Neil Armstrong , David Airlie , dri-devel@lists.freedesktop.org, linux-mips@vger.kernel.org, Laurent Pinchart , Miquel Raynal , Sam Ravnborg , Jernej Skrabec , devicetree@vger.kernel.org, Kees Cook , Jonas Karlman , Mark Brown , Maxime Ripard , letux-kernel@openphoenux.org, Ezequiel Garcia , Thomas Bogendoerfer , Liam Girdwood , Robert Foss , linux-kernel@vger.kernel.org, Rob Herring , "Eric W. Biederman" , Hans Verkuil Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Nikolaus, I will look at the patches in depth in the coming days. Le mer., nov. 10 2021 at 20:43:26 +0100, H. Nikolaus Schaller=20 a =E9crit : > This changes the way the regmap is allocated to prepare for the > later addition of the JZ4780 which has more registers and bits > than the others. >=20 > Therefore we make the regmap as big as the reg property in > the device tree tells. >=20 > Suggested-by: Paul Cercueil > Signed-off-by: H. Nikolaus Schaller > --- > drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) >=20 > diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c=20 > b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c > index 462bc0f35f1bf..4abfe5b094174 100644 > --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c > +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c > @@ -173,7 +173,6 @@ static const struct regmap_config=20 > ingenic_drm_regmap_config =3D { > .val_bits =3D 32, > .reg_stride =3D 4, >=20 > - .max_register =3D JZ_REG_LCD_SIZE1, > .writeable_reg =3D ingenic_drm_writeable_reg, > }; >=20 > @@ -1011,6 +1010,8 @@ static int ingenic_drm_bind(struct device *dev,=20 > bool has_components) > struct ingenic_drm_bridge *ib; > struct drm_device *drm; > void __iomem *base; > + struct resource *res; > + struct regmap_config regmap_config; > long parent_rate; > unsigned int i, clone_mask =3D 0; > int ret, irq; > @@ -1056,14 +1057,16 @@ static int ingenic_drm_bind(struct device=20 > *dev, bool has_components) > drm->mode_config.funcs =3D &ingenic_drm_mode_config_funcs; > drm->mode_config.helper_private =3D &ingenic_drm_mode_config_helpers; >=20 > - base =3D devm_platform_ioremap_resource(pdev, 0); > + base =3D devm_platform_get_and_ioremap_resource(pdev, 0, &res); > if (IS_ERR(base)) { > dev_err(dev, "Failed to get memory resource\n"); > return PTR_ERR(base); > } >=20 > + regmap_config =3D ingenic_drm_regmap_config; > + regmap_config.max_register =3D res->end - res->start - 4; Just a quick feedback here: I just tested and it's actually just=20 (res->end - res->start), otherwise the last register of the memory area=20 set in DT is inaccessible. Cheers, -Paul > priv->map =3D devm_regmap_init_mmio(dev, base, > - &ingenic_drm_regmap_config); > + ®map_config); > if (IS_ERR(priv->map)) { > dev_err(dev, "Failed to create regmap\n"); > return PTR_ERR(priv->map); > -- > 2.33.0 >=20