From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kevin Hilman Subject: Re: [PATCH 8/9] drm: meson: add macro used to enable HDMI PLL Date: Mon, 24 Jun 2019 16:20:29 -0700 Message-ID: <7hwohawoxu.fsf@baylibre.com> References: <86zhm782g5.fsf@baylibre.com> <86o92n82e1.fsf@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <86o92n82e1.fsf@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org To: 86zhm782g5.fsf@baylibre.com, Neil Armstrong Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Julien Masson List-Id: dri-devel@lists.freedesktop.org Julien Masson writes: > This patch add new macro HHI_HDMI_PLL_CNTL_EN which is used to enable > HDMI PLL. > > Signed-off-by: Julien Masson > --- > drivers/gpu/drm/meson/meson_vclk.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c > index e7c2b439d0f7..be6e152fc75a 100644 > --- a/drivers/gpu/drm/meson/meson_vclk.c > +++ b/drivers/gpu/drm/meson/meson_vclk.c > @@ -96,6 +96,7 @@ > #define HHI_VDAC_CNTL1 0x2F8 /* 0xbe offset in data sheet */ > > #define HHI_HDMI_PLL_CNTL 0x320 /* 0xc8 offset in data sheet */ > +#define HHI_HDMI_PLL_CNTL_EN BIT(30) > #define HHI_HDMI_PLL_CNTL2 0x324 /* 0xc9 offset in data sheet */ > #define HHI_HDMI_PLL_CNTL3 0x328 /* 0xca offset in data sheet */ > #define HHI_HDMI_PLL_CNTL4 0x32C /* 0xcb offset in data sheet */ > @@ -468,7 +469,7 @@ void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m, > > /* Enable and unreset */ > regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL, > - 0x7 << 28, 0x4 << 28); > + 0x7 << 28, HHI_HDMI_PLL_CNTL_EN); still using a magic const for the mask. Can use GENMASK() for this? Kevin