From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Masson Subject: [PATCH 1/9] drm: meson: mask value when writing bits relaxed Date: Mon, 24 Jun 2019 16:47:56 +0200 Message-ID: <86y31r82fo.fsf@baylibre.com> References: <86zhm782g5.fsf@baylibre.com> Reply-To: <86zhm782g5.fsf@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-kernel-owner@vger.kernel.org To: Neil Armstrong Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Julien Masson List-Id: dri-devel@lists.freedesktop.org The value used in the macro writel_bits_relaxed has to be masked since we don't want change the bits outside the mask. Signed-off-by: Julien Masson --- drivers/gpu/drm/meson/meson_registers.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h index cfaf90501bb1..c7dfbd7454e5 100644 --- a/drivers/gpu/drm/meson/meson_registers.h +++ b/drivers/gpu/drm/meson/meson_registers.h @@ -20,7 +20,7 @@ #define _REG(reg) ((reg) << 2) #define writel_bits_relaxed(mask, val, addr) \ - writel_relaxed((readl_relaxed(addr) & ~(mask)) | (val), addr) + writel_relaxed((readl_relaxed(addr) & ~(mask)) | ((val) & (mask)), addr) /* vpp2 */ #define VPP2_DUMMY_DATA 0x1900 -- 2.17.1