From: Jani Nikula <jani.nikula@intel.com>
To: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>,
akeem.g.abodunrin@intel.com, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, omer.aran@intel.com,
pragyansri.pathi@intel.com, d.scott.phillips@intel.com,
david.c.stewart@intel.com, tony.luck@intel.com,
jon.bloomfield@intel.com, sudeep.dutt@intel.com,
daniel.vetter@intel.com, joonas.lahtinen@linux.intel.com,
chris.p.wilson@intel.com, prathap.kumar.valsan@intel.com,
mika.kuoppala@intel.com, francesco.balestrieri@intel.com
Subject: Re: [PATCH 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts
Date: Fri, 31 Jan 2020 11:25:35 +0200 [thread overview]
Message-ID: <871rrg9dv4.fsf@intel.com> (raw)
In-Reply-To: <20200130165721.20342-3-akeem.g.abodunrin@intel.com>
On Thu, 30 Jan 2020, Akeem G Abodunrin <akeem.g.abodunrin@intel.com> wrote:
> diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h
> index b0ade76bec90..7ac5b3565845 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -172,6 +172,11 @@ __check_struct_size(size_t base, size_t arr, size_t count, size_t *size)
> (typeof(ptr))(__v + 1); \
> })
>
> +#define ptr_align(ptr, align) ({ \
> + unsigned long __v = (unsigned long)(ptr); \
> + (typeof(ptr))round_up(__v, (align)); \
> +})
> +
There's PTR_ALIGN() in include/kernel.h.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-01-31 9:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-30 16:57 [PATCH 0/2] Security mitigation for Intel Gen7/7.5 HWs Akeem G Abodunrin
2020-01-30 16:57 ` [PATCH 1/2] drm/i915: Add mechanism to submit a context WA on ring submission Akeem G Abodunrin
2020-01-30 16:57 ` [PATCH 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts Akeem G Abodunrin
2020-01-31 9:25 ` Jani Nikula [this message]
2020-01-31 9:52 ` Joonas Lahtinen
-- strict thread matches above, loose matches on Subject: below --
2020-02-20 22:57 [PATCH 0/2] Security mitigation for Intel Gen7/7.5 HWs Akeem G Abodunrin
2020-02-20 22:57 ` [PATCH 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts Akeem G Abodunrin
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