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From: Jani Nikula <jani.nikula@linux.intel.com>
To: dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>,
	Matt Atwood <matthew.s.atwood@intel.com>,
	"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/dp: only accept valid DP_TRAINING_AUX_RD_INTERVAL values
Date: Sun, 04 Mar 2018 12:02:21 +0200	[thread overview]
Message-ID: <87po4ktaz6.fsf@intel.com> (raw)
In-Reply-To: <1520029558-12219-1-git-send-email-matthew.s.atwood@intel.com>

On Fri, 02 Mar 2018, matthew.s.atwood@intel.com wrote:
> From: Matt Atwood <matthew.s.atwood@intel.com>
>
> For panels that do not follow Display Port specifications mask off invalid
> values for DP_TRAINING_AUX_RD_INTERVAL. Specification lists acceptable
> values 0-4 all other values are reserved and bit 7 of DPCD 0x0000e
> describes another feature. Currently the code uses all of DPCD 0x0000e and
> can cause max wait for 1024 ms instead of 16 ms as specified table 2-158.
> This address is read for both clock recovery and channel equalization.
>
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>

Cc: stable@vger.kernel.org

> ---
>  drivers/gpu/drm/drm_dp_helper.c | 4 ++--
>  include/drm/drm_dp_helper.h     | 1 +
>  2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index adf79be..a7e9b75 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -122,7 +122,7 @@ void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
>  	if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
>  		udelay(100);
>  	else
> -		mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
> +		mdelay((dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK) * 4);
>  }
>  EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
>  
> @@ -130,7 +130,7 @@ void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
>  	if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
>  		udelay(400);
>  	else
> -		mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
> +		mdelay((dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK) * 4);
>  }
>  EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
>  
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index da58a42..77ba003 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -118,6 +118,7 @@
>  # define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
>  
>  #define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
> +# define DP_TRAINING_AUX_RD_MASK            0x7     /* 1.4 */
>  
>  #define DP_ADAPTER_CAP			    0x00f   /* 1.2 */
>  # define DP_FORCE_LOAD_SENSE_CAP	    (1 << 0)

-- 
Jani Nikula, Intel Open Source Technology Center
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  parent reply	other threads:[~2018-03-04 10:02 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-02 22:25 [PATCH] drm/dp: only accept valid DP_TRAINING_AUX_RD_INTERVAL values matthew.s.atwood
2018-03-02 23:22 ` Rodrigo Vivi
2018-03-04 10:03   ` Jani Nikula
2018-03-02 23:24 ` Manasi Navare
2018-03-03  7:34 ` Benson Leung
2018-03-04 10:02 ` Jani Nikula [this message]
2018-03-06 18:37 ` [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 matthew.s.atwood
2018-03-06 19:21   ` Benson Leung
2018-03-06 23:24   ` Rodrigo Vivi
2018-03-07  0:24     ` Pandiyan, Dhinakaran
2018-03-07  0:41       ` [Intel-gfx] " Pandiyan, Dhinakaran
2018-03-07  1:36       ` Manasi Navare
2018-03-07  2:13         ` Pandiyan, Dhinakaran
2018-03-07 22:06           ` Rodrigo Vivi
2018-03-07 22:20             ` [Intel-gfx] " Manasi Navare
2018-03-07 23:44 ` matthew.s.atwood
2018-03-07 23:58   ` Ilia Mirkin
2018-03-08  0:18   ` Manasi Navare
2018-03-08  0:13 ` matthew.s.atwood
2018-03-08  0:36   ` Benson Leung
2018-03-08  0:28 ` matthew.s.atwood
2018-03-08  0:49   ` Benson Leung
2018-03-08  7:22   ` [Intel-gfx] " Jani Nikula
2018-03-09 23:49     ` Atwood, Matthew S
2018-03-12 19:39       ` Rodrigo Vivi
2018-03-14 17:40 ` matthew.s.atwood
2018-03-14 20:22   ` Rodrigo Vivi
2018-03-16 11:47   ` kbuild test robot
2018-03-14 20:20 ` matthew.s.atwood
2018-03-14 20:59   ` Rodrigo Vivi
2018-03-15 21:08 ` matthew.s.atwood
2018-03-16  0:39   ` Rodrigo Vivi
2018-03-16 23:10   ` kbuild test robot
2018-03-17  3:34   ` Benson Leung

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