From: Marek Vasut <marek.vasut@mailbox.org>
To: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>,
dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@gmail.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Magnus Damm <magnus.damm@gmail.com>,
Maxime Ripard <mripard@kernel.org>,
Simona Vetter <simona@ffwll.ch>,
Thomas Zimmermann <tzimmermann@suse.de>,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH 4/4] drm/rcar-du: dsi: Implement DSI command support
Date: Sun, 31 Aug 2025 20:57:14 +0200 [thread overview]
Message-ID: <8ec996f2-8c2e-4e81-95da-d466120b9723@mailbox.org> (raw)
In-Reply-To: <3f0fc2a6-6e12-45ff-a153-71661ddd236d@ideasonboard.com>
On 8/18/25 9:20 AM, Tomi Valkeinen wrote:
Hello Tomi,
>>> If yes, then it might take
>>> much longer until the command can be transferred.
>>
>> Do you know the upper limit , is that one or two frame times ?
>
> If using DSI video mode and the stream is on, the DSI TX has to
> interleave the commands either to the line blanking or frame blanking.
> Usually this is configurable in the DSI TX (if the chip can do
> interleaving).
>
> A read command will be the most difficult to interleave, as it takes
> more time with the BTA and reply.
>
> I think the worst case is one frame delay (next vblank).
I set the timeouts to 50ms, which at 60 Hz refresh should be a bit over
three frame delays, which should be safe.
>>> If not maybe the
>>> function should return an error if the video stream is enabled.
>>
>> I haven't seen any drivers special casing that, I'd prefer to increase
>> the timeouts. For V3, I'll update the timeout to 50ms , which is about 3
>> frame times.
>
> If the docs have no word about interleaving the commands and there are
> no related registers, I would guess that it's not supported. If this
> can't be tested, I suggest just returning an error if a command is sent
> while the video is on.
>
> You should be able to test this, though. E.g. just add a debugfs/sysfs
> file to the panel or dsi tx driver, which does a DSI command, possibly a
> read. See what happens when the video is enabled.
I patched the ili9881c panel and triggered DCS read of its ID via sysfs
attribute , I could always get valid ID, so I think we are safe here.
[...]
>>>> + /* Wait a bit between commands */
>>>> + usleep_range(1000, 2000);
>>>
>>> Why wait and wait a bit between what?
>> The consecutive command transmission was unreliable unless there was a
>> slight delay between the consecutive commands. Hence this delay.
>
> This sounds like there's a bug in the driver, or the TX or RX hardware.
> Please document the sleep clearly in the comment.
Done.
prev parent reply other threads:[~2025-08-31 18:57 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-08 14:24 [PATCH 0/4] drm/rcar-du: dsi: Implement DSI command support Marek Vasut
2025-06-08 14:24 ` [PATCH 1/4] drm/rcar-du: dsi: Convert register bits to BIT() macro Marek Vasut
2025-08-12 13:26 ` Tomi Valkeinen
2025-08-12 19:32 ` Marek Vasut
2025-08-12 20:05 ` Laurent Pinchart
2025-08-13 6:59 ` Geert Uytterhoeven
2025-08-13 20:47 ` Marek Vasut
2025-08-13 7:42 ` Tomi Valkeinen
2025-08-13 20:51 ` Marek Vasut
2025-06-08 14:24 ` [PATCH 2/4] drm/rcar-du: dsi: Remove fixed PPI lane count setup Marek Vasut
2025-08-12 13:18 ` Tomi Valkeinen
2025-08-12 13:30 ` Tomi Valkeinen
2025-08-12 19:35 ` Marek Vasut
2025-08-13 7:34 ` Tomi Valkeinen
2025-08-13 21:06 ` Marek Vasut
2025-08-14 5:39 ` Tomi Valkeinen
2025-08-17 22:46 ` Marek Vasut
2025-06-08 14:24 ` [PATCH 3/4] drm/rcar-du: dsi: Configure TXSETR register to match PPI lane count Marek Vasut
2025-06-08 14:24 ` [PATCH 4/4] drm/rcar-du: dsi: Implement DSI command support Marek Vasut
2025-06-09 0:51 ` kernel test robot
2025-08-12 14:36 ` Tomi Valkeinen
2025-08-17 23:40 ` Marek Vasut
2025-08-18 7:20 ` Tomi Valkeinen
2025-08-31 18:57 ` Marek Vasut [this message]
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