From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
Subject: Re: [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info
Date: Wed, 21 Jul 2021 20:05:20 +0200 [thread overview]
Message-ID: <91447d98-cf2d-cf60-e1c8-1bb13b4ae12d@intel.com> (raw)
In-Reply-To: <20210721161120.24610-10-vinay.belgaumkar@intel.com>
On 21.07.2021 18:11, Vinay Belgaumkar wrote:
> This prints out relevant SLPC info from the SLPC shared structure.
>
> We will send a h2g message which forces SLPC to update the
> shared data structure with latest information before reading it.
>
> v2: Address review comments (Michal W)
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 23 +++++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 40 +++++++++++++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 4 +-
> 3 files changed, 66 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> index 72ddfff42f7d..46b22187927b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> @@ -12,6 +12,7 @@
> #include "gt/uc/intel_guc_ct.h"
> #include "gt/uc/intel_guc_ads.h"
> #include "gt/uc/intel_guc_submission.h"
> +#include "gt/uc/intel_guc_slpc.h"
>
> static int guc_info_show(struct seq_file *m, void *data)
> {
> @@ -50,11 +51,33 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
> }
> DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
>
> +static int guc_slpc_info_show(struct seq_file *m, void *unused)
> +{
> + struct intel_guc *guc = m->private;
> + struct intel_guc_slpc *slpc = &guc->slpc;
> + struct drm_printer p = drm_seq_file_printer(m);
> +
> + if (!intel_guc_slpc_is_used(guc))
> + return -ENODEV;
> +
> + return intel_guc_slpc_info(slpc, &p);
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
> +
> +bool intel_eval_slpc_support(void *data)
> +{
> + struct intel_guc *guc;
> +
> + guc = (struct intel_guc *)data;
struct intel_guc *guc = (struct intel_guc *)data;
> + return intel_guc_slpc_is_used(guc);
> +}
> +
> void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
> {
> static const struct debugfs_gt_file files[] = {
> { "guc_info", &guc_info_fops, NULL },
> { "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
> + { "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
> };
>
> if (!intel_guc_is_supported(guc))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index c1cf8d46e360..73379985c105 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -430,6 +430,46 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)
> return 0;
> }
>
> +int intel_guc_slpc_info(struct intel_guc_slpc *slpc, struct drm_printer *p)
> +{
> + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915;
> + struct slpc_shared_data *data;
> + struct slpc_task_state_data *slpc_tasks;
> + intel_wakeref_t wakeref;
> + int ret = 0;
> +
> + with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
> + if (slpc_query_task_state(slpc))
> + return -EIO;
not sure if you can return directly from "with_rpm"
> +
> + slpc_tasks = &data->task_state_data;
> +
> + drm_printf(p, "SLPC state: %s\n", slpc_state_string(slpc));
> + drm_printf(p, "\tgtperf task active: %s\n",
> + yesno(slpc_tasks->status & SLPC_GTPERF_TASK_ACTIVE));
> + drm_printf(p, "\tdcc task active: %s\n",
> + yesno(slpc_tasks->status & SLPC_DCC_TASK_ACTIVE));
> + drm_printf(p, "\tin dcc: %s\n",
> + yesno(slpc_tasks->status & SLPC_IN_DCC));
> + drm_printf(p, "\tfreq switch active: %s\n",
> + yesno(slpc_tasks->status & SLPC_FREQ_SWITCH_ACTIVE));
> + drm_printf(p, "\tibc enabled: %s\n",
> + yesno(slpc_tasks->status & SLPC_IBC_ENABLED));
> + drm_printf(p, "\tibc active: %s\n",
> + yesno(slpc_tasks->status & SLPC_IBC_ACTIVE));
> + drm_printf(p, "\tpg1 enabled: %s\n",
> + yesno(slpc_tasks->status & SLPC_PG1_ENABLED));
> + drm_printf(p, "\tpg1 active: %s\n",
> + yesno(slpc_tasks->status & SLPC_PG1_ACTIVE));
> + drm_printf(p, "\tmax freq: %dMHz\n",
> + slpc_decode_max_freq(slpc));
> + drm_printf(p, "\tmin freq: %dMHz\n",
> + slpc_decode_min_freq(slpc));
not sure what they are:
DCC ?
IBC ?
PG1 ?
and make sure to use %u for unsigned
Michal
> + }
> +
> + return ret;
> +}
> +
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
> {
> if (!slpc->vma)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> index 627c71a95777..852c6316aa47 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> @@ -10,6 +10,8 @@
> #include "intel_guc_slpc_types.h"
> #include "abi/guc_actions_slpc_abi.h"
>
> +struct drm_printer;
> +
> static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
> {
> return guc->slpc_supported;
> @@ -26,7 +28,6 @@ static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
> }
>
> void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
> -
> int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
> int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
> @@ -34,5 +35,6 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
> int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
> +int intel_guc_slpc_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
>
> #endif
>
next prev parent reply other threads:[~2021-07-21 18:05 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 16:11 [PATCH v2 00/14] drm/i915/guc: Enable GuC based power management features Vinay Belgaumkar
2021-07-21 16:11 ` [PATCH 01/14] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar
2021-07-21 16:11 ` [PATCH 02/14] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar
2021-07-21 17:24 ` Michal Wajdeczko
2021-07-22 0:56 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 03/14] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar
2021-07-21 16:11 ` [PATCH 04/14] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar
2021-07-21 17:25 ` Michal Wajdeczko
2021-07-23 19:26 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 05/14] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar
2021-07-21 17:26 ` [Intel-gfx] " Michal Wajdeczko
2021-07-23 19:30 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar
2021-07-21 17:38 ` Michal Wajdeczko
2021-07-23 19:28 ` Belgaumkar, Vinay
2021-07-21 23:44 ` kernel test robot
2021-07-22 2:36 ` kernel test robot
2021-07-22 18:07 ` kernel test robot
2021-07-22 18:07 ` [RFC PATCH] drm/i915/guc/slpc: slpc_decode_min_freq() can be static kernel test robot
2021-07-23 13:04 ` [PATCH 06/14] drm/i915/guc/slpc: Enable SLPC and add related H2G events kernel test robot
2021-07-24 16:30 ` kernel test robot
2021-07-21 16:11 ` [PATCH 07/14] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-21 17:42 ` Michal Wajdeczko
2021-07-23 19:35 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 08/14] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-21 18:00 ` Michal Wajdeczko
2021-07-23 19:43 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-21 18:05 ` Michal Wajdeczko [this message]
2021-07-23 19:49 ` Belgaumkar, Vinay
2021-07-22 1:29 ` kernel test robot
2021-07-24 0:31 ` kernel test robot
2021-07-24 0:31 ` [RFC PATCH] drm/i915/guc/slpc: intel_eval_slpc_support() can be static kernel test robot
2021-07-25 2:57 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info kernel test robot
2021-07-21 16:11 ` [PATCH 10/14] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-21 16:11 ` [PATCH 11/14] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar
2021-07-21 18:09 ` Michal Wajdeczko
2021-07-23 22:25 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 12/14] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar
2021-07-21 18:13 ` Michal Wajdeczko
2021-07-23 22:28 ` Belgaumkar, Vinay
2021-07-21 16:11 ` [PATCH 13/14] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar
2021-07-21 16:11 ` [PATCH 14/14] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-21 18:21 ` Michal Wajdeczko
2021-07-23 22:29 ` Belgaumkar, Vinay
-- strict thread matches above, loose matches on Subject: below --
2021-07-28 21:11 [PATCH v4 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-28 21:11 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-30 2:00 [PATCH v5 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-30 2:01 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-30 20:21 [PATCH v6 00/14] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-30 20:21 ` [PATCH 09/14] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
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