Re: [Intel-gfx] [PATCH v3 5/5] drm/i915: Limit the display memory alignment to 32 bit instead of 64

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

On 25/11/2022 22:30, Andi Shyti wrote:
> Chris commit "drm/i915: Introduce guard pages to i915_vma" was
> "cunningly" changing display_alignment to u32 from u64. The
> reason is that the display GGTT is and will be limited o 4GB.
> 
> Put it in a separate patch and use "max(...)" instead of
> "max_t(64, ...)" when asigning the value. We can safely use max
> as we know beforehand that the comparison is between two u32
> variables.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_fb_pin.c | 2 +-
>   drivers/gpu/drm/i915/gem/i915_gem_domain.c  | 2 +-
>   drivers/gpu/drm/i915/i915_vma_types.h       | 2 +-
>   3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> index 6900acbb1381c..1aca7552a85d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -91,7 +91,7 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
>   		goto err;
>   	}
>   
> -	vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
> +	vma->display_alignment = max(vma->display_alignment, alignment);
>   
>   	i915_gem_object_flush_if_display(obj);
>   
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 882b91519f92b..9969e687ad857 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -457,7 +457,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   	if (IS_ERR(vma))
>   		return vma;
>   
> -	vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
> +	vma->display_alignment = max(vma->display_alignment, alignment);
>   	i915_vma_mark_scanout(vma);
>   
>   	i915_gem_object_flush_if_display_locked(obj);
> diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
> index 46f5ce19d4a0a..77fda2244d161 100644
> --- a/drivers/gpu/drm/i915/i915_vma_types.h
> +++ b/drivers/gpu/drm/i915/i915_vma_types.h
> @@ -197,7 +197,6 @@ struct i915_vma {
>   	struct i915_fence_reg *fence;
>   
>   	u64 size;
> -	u64 display_alignment;
>   	struct i915_page_sizes page_sizes;
>   
>   	/* mmap-offset associated with fencing for this vma */
> @@ -206,6 +205,7 @@ struct i915_vma {
>   	u32 guard; /* padding allocated around vma->pages within the node */
>   	u32 fence_size;
>   	u32 fence_alignment;
> +	u32 display_alignment;
>   
>   	/**
>   	 * Count of the number of times this vma has been opened by different

I would have put this patch first in the series, because patch 2 now 
does not need to do max -> max_t on the respective line, but okay.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko