From: Alex Deucher <alexdeucher@gmail.com>
To: "Christian König" <deathsimple@vodafone.de>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 1/4] drm/radeon: only save UVD bo when we have open handles
Date: Mon, 5 Aug 2013 19:32:15 -0400 [thread overview]
Message-ID: <CADnq5_MJRNspac-BQoGsHfzswirySLfgHgy3ZQBb3ybHPYToWA@mail.gmail.com> (raw)
In-Reply-To: <1375704658-2769-1-git-send-email-deathsimple@vodafone.de>
On Mon, Aug 5, 2013 at 8:10 AM, Christian König <deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> Otherwise just reinitialize from scratch on resume,
> and so make it more likely to succeed.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> Cc: stable@vger.kernel.org
Pulled the series into my -fixes branch.
Alex
> ---
> drivers/gpu/drm/radeon/cik.c | 2 +-
> drivers/gpu/drm/radeon/radeon.h | 2 +-
> drivers/gpu/drm/radeon/radeon_fence.c | 2 +-
> drivers/gpu/drm/radeon/radeon_uvd.c | 46 +++++++++++++++++++++++----------
> drivers/gpu/drm/radeon/rv770.c | 2 +-
> 5 files changed, 37 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 524db70..ecb883d 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -6979,7 +6979,7 @@ int cik_uvd_resume(struct radeon_device *rdev)
>
> /* programm the VCPU memory controller bits 0-27 */
> addr = rdev->uvd.gpu_addr >> 3;
> - size = RADEON_GPU_PAGE_ALIGN(rdev->uvd.fw_size + 4) >> 3;
> + size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;
> WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
> WREG32(UVD_VCPU_CACHE_SIZE0, size);
>
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 2f08219..76dbe8e 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1468,7 +1468,6 @@ struct radeon_uvd {
> void *cpu_addr;
> uint64_t gpu_addr;
> void *saved_bo;
> - unsigned fw_size;
> atomic_t handles[RADEON_MAX_UVD_HANDLES];
> struct drm_file *filp[RADEON_MAX_UVD_HANDLES];
> struct delayed_work idle_work;
> @@ -2066,6 +2065,7 @@ struct radeon_device {
> const struct firmware *mec_fw; /* CIK MEC firmware */
> const struct firmware *sdma_fw; /* CIK SDMA firmware */
> const struct firmware *smc_fw; /* SMC firmware */
> + const struct firmware *uvd_fw; /* UVD firmware */
> struct r600_blit r600_blit;
> struct r600_vram_scratch vram_scratch;
> int msi_enabled; /* msi enabled */
> diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
> index 7ddb0ef..ddb8f8e 100644
> --- a/drivers/gpu/drm/radeon/radeon_fence.c
> +++ b/drivers/gpu/drm/radeon/radeon_fence.c
> @@ -782,7 +782,7 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
>
> } else {
> /* put fence directly behind firmware */
> - index = ALIGN(rdev->uvd.fw_size, 8);
> + index = ALIGN(rdev->uvd_fw->size, 8);
> rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + index;
> rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + index;
> }
> diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
> index 414fd14..ca0d735 100644
> --- a/drivers/gpu/drm/radeon/radeon_uvd.c
> +++ b/drivers/gpu/drm/radeon/radeon_uvd.c
> @@ -56,7 +56,6 @@ static void radeon_uvd_idle_work_handler(struct work_struct *work);
>
> int radeon_uvd_init(struct radeon_device *rdev)
> {
> - const struct firmware *fw;
> unsigned long bo_size;
> const char *fw_name;
> int i, r;
> @@ -105,14 +104,14 @@ int radeon_uvd_init(struct radeon_device *rdev)
> return -EINVAL;
> }
>
> - r = request_firmware(&fw, fw_name, rdev->dev);
> + r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev);
> if (r) {
> dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n",
> fw_name);
> return r;
> }
>
> - bo_size = RADEON_GPU_PAGE_ALIGN(fw->size + 8) +
> + bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 8) +
> RADEON_UVD_STACK_SIZE + RADEON_UVD_HEAP_SIZE;
> r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true,
> RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->uvd.vcpu_bo);
> @@ -145,12 +144,6 @@ int radeon_uvd_init(struct radeon_device *rdev)
>
> radeon_bo_unreserve(rdev->uvd.vcpu_bo);
>
> - rdev->uvd.fw_size = fw->size;
> - memset(rdev->uvd.cpu_addr, 0, bo_size);
> - memcpy(rdev->uvd.cpu_addr, fw->data, fw->size);
> -
> - release_firmware(fw);
> -
> for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i) {
> atomic_set(&rdev->uvd.handles[i], 0);
> rdev->uvd.filp[i] = NULL;
> @@ -174,33 +167,60 @@ void radeon_uvd_fini(struct radeon_device *rdev)
> }
>
> radeon_bo_unref(&rdev->uvd.vcpu_bo);
> +
> + release_firmware(rdev->uvd_fw);
> }
>
> int radeon_uvd_suspend(struct radeon_device *rdev)
> {
> unsigned size;
> + void *ptr;
> + int i;
>
> if (rdev->uvd.vcpu_bo == NULL)
> return 0;
>
> + for (i = 0; i < RADEON_MAX_UVD_HANDLES; ++i)
> + if (atomic_read(&rdev->uvd.handles[i]))
> + break;
> +
> + if (i == RADEON_MAX_UVD_HANDLES)
> + return 0;
> +
> size = radeon_bo_size(rdev->uvd.vcpu_bo);
> + size -= rdev->uvd_fw->size;
> +
> + ptr = rdev->uvd.cpu_addr;
> + ptr += rdev->uvd_fw->size;
> +
> rdev->uvd.saved_bo = kmalloc(size, GFP_KERNEL);
> - memcpy(rdev->uvd.saved_bo, rdev->uvd.cpu_addr, size);
> + memcpy(rdev->uvd.saved_bo, ptr, size);
>
> return 0;
> }
>
> int radeon_uvd_resume(struct radeon_device *rdev)
> {
> + unsigned size;
> + void *ptr;
> +
> if (rdev->uvd.vcpu_bo == NULL)
> return -EINVAL;
>
> + memcpy(rdev->uvd.cpu_addr, rdev->uvd_fw->data, rdev->uvd_fw->size);
> +
> + size = radeon_bo_size(rdev->uvd.vcpu_bo);
> + size -= rdev->uvd_fw->size;
> +
> + ptr = rdev->uvd.cpu_addr;
> + ptr += rdev->uvd_fw->size;
> +
> if (rdev->uvd.saved_bo != NULL) {
> - unsigned size = radeon_bo_size(rdev->uvd.vcpu_bo);
> - memcpy(rdev->uvd.cpu_addr, rdev->uvd.saved_bo, size);
> + memcpy(ptr, rdev->uvd.saved_bo, size);
> kfree(rdev->uvd.saved_bo);
> rdev->uvd.saved_bo = NULL;
> - }
> + } else
> + memset(ptr, 0, size);
>
> return 0;
> }
> diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
> index f101013..0804d60 100644
> --- a/drivers/gpu/drm/radeon/rv770.c
> +++ b/drivers/gpu/drm/radeon/rv770.c
> @@ -813,7 +813,7 @@ int rv770_uvd_resume(struct radeon_device *rdev)
>
> /* programm the VCPU memory controller bits 0-27 */
> addr = rdev->uvd.gpu_addr >> 3;
> - size = RADEON_GPU_PAGE_ALIGN(rdev->uvd.fw_size + 4) >> 3;
> + size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;
> WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
> WREG32(UVD_VCPU_CACHE_SIZE0, size);
>
> --
> 1.7.9.5
>
prev parent reply other threads:[~2013-08-05 23:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-05 12:10 [PATCH 1/4] drm/radeon: only save UVD bo when we have open handles Christian König
2013-08-05 12:10 ` [PATCH 2/4] drm/radeon: stop sending invalid UVD destroy msg Christian König
2013-08-05 12:10 ` [PATCH 3/4] drm/radeon: add more UVD CS checking Christian König
2013-08-05 12:10 ` [PATCH 4/4] drm/radeon: remove unnecessary unpin Christian König
2013-08-05 23:32 ` Alex Deucher [this message]
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