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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ1PR11MB6129.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 791bc5e0-c781-4777-3c2d-08ddbf1951fd X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jul 2025 18:49:22.6918 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: hTUWsQ09tMX8Ax+BaHnCYdDQqL6UzdP7GobyePS5eJUR68H96mHJH8c9q99itEP8RKpoBekvMxx0J5pHFWx/myCWsLmQN4ypXu/nIc1fr5E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB8131 X-OriginatorOrg: intel.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Alex, > -----Original Message----- > From: Alex Hung > Sent: Tuesday, June 17, 2025 9:47 AM > To: dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org > Cc: wayland-devel@lists.freedesktop.org; harry.wentland@amd.com; > alex.hung@amd.com; leo.liu@amd.com; ville.syrjala@linux.intel.com; > pekka.paalanen@collabora.com; contact@emersion.fr; mwen@igalia.com; > jadahl@redhat.com; sebastian.wick@redhat.com; > shashank.sharma@amd.com; agoins@nvidia.com; joshua@froggi.es; > mdaenzer@redhat.com; aleixpol@kde.org; xaver.hugl@gmail.com; > victoria@system76.com; daniel@ffwll.ch; Shankar, Uma > ; quic_naseer@quicinc.com; > quic_cbraga@quicinc.com; quic_abhinavk@quicinc.com; marcan@marcan.st; > Liviu.Dudau@arm.com; sashamcintosh@google.com; Borah, Chaitanya > Kumar ; louis.chauvet@bootlin.com; > arthurgrillo@riseup.net > Subject: [PATCH V10 33/46] drm: Add Enhanced LUT precision structure >=20 > From: Uma Shankar >=20 > Existing LUT precision structure drm_color_lut has only 16 bit precision.= This > is not enough for upcoming enhanced hardwares and advance usecases like > HDR processing. Hence added a new structure with 32 bit precision values. >=20 > Signed-off-by: Alex Hung > Signed-off-by: Uma Shankar > Signed-off-by: Chaitanya Kumar Borah > --- > V10: > - Include drm_color_lut_32 from Intel to support 32BIT RGB in 1D & 3D > LUTs (Uma Shankar) >=20 > drivers/gpu/drm/drm_color_mgmt.c | 43 > ++++++++++++++++++++++++++++++++ > include/drm/drm_color_mgmt.h | 13 ++++++++++ > include/uapi/drm/drm_mode.h | 11 ++++++++ > 3 files changed, 67 insertions(+) >=20 > diff --git a/drivers/gpu/drm/drm_color_mgmt.c > b/drivers/gpu/drm/drm_color_mgmt.c > index 3969dc548cff..83dc850d3b54 100644 > --- a/drivers/gpu/drm/drm_color_mgmt.c > +++ b/drivers/gpu/drm/drm_color_mgmt.c > @@ -630,3 +630,46 @@ int drm_color_lut_check(const struct > drm_property_blob *lut, u32 tests) > return 0; > } > EXPORT_SYMBOL(drm_color_lut_check); > + > +/** > + * drm_color_lut_32_check - check validity of extended lookup table > + * @lut: property blob containing extended LUT to check > + * @tests: bitmask of tests to run > + * > + * Helper to check whether a userspace-provided extended lookup table > +is valid and > + * satisfies hardware requirements. Drivers pass a bitmask indicating > +which of > + * the tests in &drm_color_lut_tests should be performed. > + * > + * Returns 0 on success, -EINVAL on failure. > + */ > +int drm_color_lut_32_check(const struct drm_property_blob *lut, u32 > +tests) { > + const struct drm_color_lut_32 *entry; > + int i; > + > + if (!lut || !tests) > + return 0; > + > + entry =3D lut->data; > + for (i =3D 0; i < drm_color_lut_32_size(lut); i++) { > + if (tests & DRM_COLOR_LUT_EQUAL_CHANNELS) { > + if (entry[i].red !=3D entry[i].blue || > + entry[i].red !=3D entry[i].green) { > + DRM_DEBUG_KMS("All LUT entries must have > equal r/g/b\n"); > + return -EINVAL; > + } > + } > + > + if (i > 0 && tests & DRM_COLOR_LUT_NON_DECREASING) { > + if (entry[i].red < entry[i - 1].red || > + entry[i].green < entry[i - 1].green || > + entry[i].blue < entry[i - 1].blue) { > + DRM_DEBUG_KMS("LUT entries must never > decrease.\n"); > + return -EINVAL; > + } > + } > + } > + > + return 0; > +} > +EXPORT_SYMBOL(drm_color_lut_32_check); > diff --git a/include/drm/drm_color_mgmt.h > b/include/drm/drm_color_mgmt.h index ed81741036d7..882253a82bf1 > 100644 > --- a/include/drm/drm_color_mgmt.h > +++ b/include/drm/drm_color_mgmt.h > @@ -72,6 +72,18 @@ static inline int drm_color_lut_size(const struct > drm_property_blob *blob) > return blob->length / sizeof(struct drm_color_lut); } >=20 > +/** > + * drm_color_lut_32_size - calculate the number of entries in the > +extended LUT > + * @blob: blob containing the LUT > + * > + * Returns: > + * The number of entries in the color LUT stored in @blob. > + */ > +static inline int drm_color_lut_32_size(const struct drm_property_blob > +*blob) { > + return blob->length / sizeof(struct drm_color_lut_32); } > + > enum drm_color_encoding { > DRM_COLOR_YCBCR_BT601, > DRM_COLOR_YCBCR_BT709, > @@ -118,4 +130,5 @@ enum drm_color_lut_tests { }; >=20 > int drm_color_lut_check(const struct drm_property_blob *lut, u32 tests); > +int drm_color_lut_32_check(const struct drm_property_blob *lut, u32 > +tests); > #endif > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h > index 651bdf48b766..21bd96f437e0 100644 > --- a/include/uapi/drm/drm_mode.h > +++ b/include/uapi/drm/drm_mode.h > @@ -872,6 +872,16 @@ struct drm_color_lut { > __u16 reserved; > }; >=20 > +struct drm_color_lut_32 { > + /* > + * Similar to drm_color_lut but for high precision LUTs > + */ > + __u32 red; > + __u32 green; > + __u32 blue; > + __u32 reserved; > +}; > + Since currently there is no way for the kernel to communicate the precision= of HW to user-space, I am guessing that we assume the precision of the LUT= as U0.32 and driver is responsible for converting it to whatever the precision the H= W needs. In that case, do we also need a function to extract that similar to drm_col= or_lut_extract(). Something on the line of [1]. [1] https://lore.kernel.org/intel-gfx/20250702091936.3004854-7-uma.shankar@= intel.com/ Regards Chaitanya > /** > * enum drm_colorop_type - Type of color operation > * > @@ -879,6 +889,7 @@ struct drm_color_lut { > * and defines a different set of properties. This enum defines all type= s and > * gives a high-level description. > */ > + > enum drm_colorop_type { > /** > * @DRM_COLOROP_1D_CURVE: > -- > 2.43.0