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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id t21sm1140288otd.35.2021.06.24.20.39.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Jun 2021 20:39:24 -0700 (PDT) Date: Thu, 24 Jun 2021 22:39:22 -0500 From: Bjorn Andersson To: Rob Clark Subject: Re: [PATCH v5 3/5] drm/msm: Improve the a6xx page fault handler Message-ID: References: <20210610214431.539029-1-robdclark@gmail.com> <20210610214431.539029-4-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210610214431.539029-4-robdclark@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Clark , freedreno@lists.freedesktop.org, Jordan Crouse , Jonathan Marek , David Airlie , linux-arm-msm@vger.kernel.org, Sharat Masetty , Konrad Dybcio , Douglas Anderson , dri-devel@lists.freedesktop.org, Akhil P Oommen , Eric Anholt , iommu@lists.linux-foundation.org, "Kristian H. Kristensen" , AngeloGioacchino Del Regno , Marijn Suijten , Sean Paul , open list Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu 10 Jun 16:44 CDT 2021, Rob Clark wrote: [..] > diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c > index 50d881794758..6975b95c3c29 100644 > --- a/drivers/gpu/drm/msm/msm_iommu.c > +++ b/drivers/gpu/drm/msm/msm_iommu.c > @@ -211,8 +211,17 @@ static int msm_fault_handler(struct iommu_domain *domain, struct device *dev, > unsigned long iova, int flags, void *arg) > { > struct msm_iommu *iommu = arg; > + struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(iommu->base.dev); > + struct adreno_smmu_fault_info info, *ptr = NULL; > + > + if (adreno_smmu->get_fault_info) { This seemed reasonable when I read it last time, but I didn't realize that the msm_fault_handler() is installed for all msm_iommu instances. So while we're trying to recover from the boot splash and setup the new framebuffer we end up here with iommu->base.dev being the mdss device. Naturally drvdata of mdss is not a struct adreno_smmu_priv. > + adreno_smmu->get_fault_info(adreno_smmu->cookie, &info); So here we just jump straight out into hyperspace, never to return. Not sure how to wire this up to avoid the problem, but right now I don't think we can boot any device with a boot splash. Regards, Bjorn > + ptr = &info; > + } > + > if (iommu->base.handler) > - return iommu->base.handler(iommu->base.arg, iova, flags); > + return iommu->base.handler(iommu->base.arg, iova, flags, ptr); > + > pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags); > return 0; > }