Re: [PATCH v5 03/15] drm/i915/pxp: define PXP device flag and kconfig

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Thu, Jul 15, 2021 at 09:10:22PM -0700, Daniele Ceraolo Spurio wrote:
> Ahead of the PXP implementation, define the relevant define flag and
> kconfig option.
> 
> v2: flip kconfig default to N. Some machines have IFWIs that do not
> support PXP, so we need it to be an opt-in until we add support to query
> the caps from the mei device.

ack

> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> #v1

rvb still valid

> ---
>  drivers/gpu/drm/i915/Kconfig             | 11 +++++++++++
>  drivers/gpu/drm/i915/i915_drv.h          |  4 ++++
>  drivers/gpu/drm/i915/intel_device_info.h |  1 +
>  3 files changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> index f960f5d7664e..5987c3d5d9fb 100644
> --- a/drivers/gpu/drm/i915/Kconfig
> +++ b/drivers/gpu/drm/i915/Kconfig
> @@ -131,6 +131,17 @@ config DRM_I915_GVT_KVMGT
>  	  Choose this option if you want to enable KVMGT support for
>  	  Intel GVT-g.
>  
> +config DRM_I915_PXP
> +	bool "Enable Intel PXP support for Intel Gen12+ platform"
> +	depends on DRM_I915
> +	depends on INTEL_MEI && INTEL_MEI_PXP
> +	default n
> +	help
> +	  PXP (Protected Xe Path) is an i915 component, available on GEN12+
> +	  GPUs, that helps to establish the hardware protected session and
> +	  manage the status of the alive software session, as well as its life
> +	  cycle.
> +
>  menu "drm/i915 Debugging"
>  depends on DRM_I915
>  depends on EXPERT
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c4747f4407ef..772f9f0b6ddb 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1752,6 +1752,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_VRR(i915)	(GRAPHICS_VER(i915) >= 12)
>  
> +#define HAS_PXP(dev_priv) (IS_ENABLED(CONFIG_DRM_I915_PXP) && \
> +			   INTEL_INFO(dev_priv)->has_pxp) && \
> +			   VDBOX_MASK(&dev_priv->gt)
> +
>  /* Only valid when HAS_DISPLAY() is true */
>  #define INTEL_DISPLAY_ENABLED(dev_priv) \
>  	(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index bd83004c78b6..8e9597008b8a 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -129,6 +129,7 @@ enum intel_ppgtt_type {
>  	func(has_logical_ring_elsq); \
>  	func(has_master_unit_irq); \
>  	func(has_pooled_eu); \
> +	func(has_pxp); \
>  	func(has_rc6); \
>  	func(has_rc6p); \
>  	func(has_rps); \
> -- 
> 2.32.0
>