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Thu, 19 Aug 2021 10:03:49 -0700 (PDT) Date: Thu, 19 Aug 2021 19:03:48 +0200 From: Thierry Reding To: Dmitry Osipenko Cc: Jonathan Hunter , Ulf Hansson , Viresh Kumar , Stephen Boyd , Peter De Schrijver , Mikko Perttunen , Peter Chen , Mark Brown , Lee Jones , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , Nishanth Menon , Vignesh Raghavendra , Richard Weinberger , Miquel Raynal , Lucas Stach , Stefan Agner , Adrian Hunter , Mauro Carvalho Chehab , Rob Herring , Michael Turquette , linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-usb@vger.kernel.org, linux-staging@lists.linux.dev, linux-spi@vger.kernel.org, linux-pwm@vger.kernel.org, linux-mtd@lists.infradead.org, linux-mmc@vger.kernel.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v8 20/34] mmc: sdhci-tegra: Add runtime PM and OPP support Message-ID: References: <20210817012754.8710-1-digetx@gmail.com> <20210817012754.8710-21-digetx@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Zkl/ZGRNLhkdNGO0" Content-Disposition: inline In-Reply-To: <20210817012754.8710-21-digetx@gmail.com> User-Agent: Mutt/2.1.1 (e2a89abc) (2021-07-12) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" --Zkl/ZGRNLhkdNGO0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Aug 17, 2021 at 04:27:40AM +0300, Dmitry Osipenko wrote: > The SDHCI on Tegra belongs to the core power domain and we're going to > enable GENPD support for the core domain. Now SDHCI must be resumed using > runtime PM API in order to initialize the SDHCI power state. The SDHCI > clock rate must be changed using OPP API that will reconfigure the power > domain performance state in accordance to the rate. Add runtime PM and OPP > support to the SDHCI driver. >=20 > Signed-off-by: Dmitry Osipenko > --- > drivers/mmc/host/sdhci-tegra.c | 146 ++++++++++++++++++++++++--------- > 1 file changed, 105 insertions(+), 41 deletions(-) >=20 > diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegr= a.c > index 387ce9cdbd7c..a3583359c972 100644 > --- a/drivers/mmc/host/sdhci-tegra.c > +++ b/drivers/mmc/host/sdhci-tegra.c > @@ -15,6 +15,8 @@ > #include > #include > #include > +#include > +#include > #include > #include > #include > @@ -24,6 +26,8 @@ > #include > #include > =20 > +#include > + > #include "sdhci-pltfm.h" > #include "cqhci.h" > =20 > @@ -123,6 +127,12 @@ > SDHCI_TRNS_BLK_CNT_EN | \ > SDHCI_TRNS_DMA) > =20 > +enum { > + TEGRA_CLK_BULK_SDHCI, > + TEGRA_CLK_BULK_TMCLK, > + TEGRA_CLK_BULK_NUM, > +}; > + > struct sdhci_tegra_soc_data { > const struct sdhci_pltfm_data *pdata; > u64 dma_mask; > @@ -171,6 +181,8 @@ struct sdhci_tegra { > bool enable_hwcq; > unsigned long curr_clk_rate; > u8 tuned_tap_delay; > + > + struct clk_bulk_data clocks[TEGRA_CLK_BULK_NUM]; This doesn't seem worth it to me. There's a lot of churn in this driver that's only needed to convert this to the clk_bulk API and it makes the code a lot more difficult to read, in my opinion. It looks like the only benefit that this gives us is that runtime suspend and resume become a few lines shorter. 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