Re: [PATCH v2 1/8] drm/kmb: Work around for higher system clock

[Sam Ravnborg <sam@ravnborg.org>]

Hi Anitha,

On Tue, Aug 03, 2021 at 03:04:45PM -0700, Anitha Chrisanthus wrote:
> Use a different value for system clock offset in the
> ppl/llp ratio calculations for clocks higher than 500 Mhz.
> 
> Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
> Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
> ---
>  drivers/gpu/drm/kmb/kmb_dsi.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/kmb/kmb_dsi.c b/drivers/gpu/drm/kmb/kmb_dsi.c
> index 231041b269f5..7e2371ffcb18 100644
> --- a/drivers/gpu/drm/kmb/kmb_dsi.c
> +++ b/drivers/gpu/drm/kmb/kmb_dsi.c
> @@ -482,6 +482,10 @@ static u32 mipi_tx_fg_section_cfg(struct kmb_dsi *kmb_dsi,
>  	return 0;
>  }
>  
> +#define CLK_DIFF_LOW 50
> +#define CLK_DIFF_HI 60
> +#define SYSCLK_500  500
> +
>  static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,
>  				struct mipi_tx_frame_timing_cfg *fg_cfg)
>  {
> @@ -492,7 +496,12 @@ static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,
>  	/* 500 Mhz system clock minus 50 to account for the difference in
>  	 * MIPI clock speed in RTL tests
>  	 */
The comment should be updated to match the code.

	Sam

> -	sysclk = kmb_dsi->sys_clk_mhz - 50;
> +	if (kmb_dsi->sys_clk_mhz == SYSCLK_500) {
> +		sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_LOW;
> +	} else {
> +		/* 700 Mhz clk*/
> +		sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_HI;
> +	}
>  
>  	/* PPL-Pixel Packing Layer, LLP-Low Level Protocol
>  	 * Frame genartor timing parameters are clocked on the system clock,
> -- 
> 2.25.1