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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v3 5/5] drm/i915/dg2: extend Wa_1409120013 to DG2
Date: Wed, 17 Nov 2021 20:54:26 +0200	[thread overview]
Message-ID: <YZVP4oz4Whxptqn0@intel.com> (raw)
In-Reply-To: <YZVNR9i5nkJZIORP@intel.com>

On Wed, Nov 17, 2021 at 08:43:19PM +0200, Ville Syrjälä wrote:
> On Tue, Nov 16, 2021 at 09:48:18AM -0800, Matt Roper wrote:
> > From: Matt Atwood <matthew.s.atwood@intel.com>
> > 
> > Extend existing workaround 1409120013 to DG2.
> 
> I don't see this listed for DG2.
> 
> > 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 89dc7f69baf3..e721c421cc58 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -7444,9 +7444,9 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> >  
> >  static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv)
> >  {
> > -	/* Wa_1409120013:tgl,rkl,adl-s,dg1 */
> > +	/* Wa_1409120013:tgl,rkl,adl-s,dg1,dg2 */
> >  	if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv) ||
> > -	    IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv))
> > +	    IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv) || IS_DG2(dev_priv))

AFAIK we're not even calling this function on dg2, so this is just dead
code. And in fact without dg2 this seems to be the same as DISPLAY_VER==12
so we shuld stop calling it on adl-p as well. We could then rip out most
of the platform checks in here.

> >  		intel_uncore_write(&dev_priv->uncore, ILK_DPFC_CHICKEN,
> >  				   DPFC_CHICKEN_COMP_DUMMY_PIXEL);
> >  
> > -- 
> > 2.33.0
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel

  parent reply	other threads:[~2021-11-17 18:54 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-16 17:48 [PATCH v3 0/5] i915: Additional DG2 workarounds Matt Roper
2021-11-16 17:48 ` [PATCH v3 1/5] drm/i915/dg2: s/DISP_STEPPING/DISPLAY_STEPPING/ Matt Roper
2021-11-16 19:39   ` Jani Nikula
2021-11-16 17:48 ` [PATCH v3 2/5] drm/i915/dg2: Add Wa_14010547955 Matt Roper
2021-12-02 22:47   ` [Intel-gfx] " Clint Taylor
2021-11-16 17:48 ` [PATCH v3 3/5] drm/i915/dg2: Add Wa_16011777198 Matt Roper
2021-12-02 22:54   ` [Intel-gfx] " Clint Taylor
2021-11-16 17:48 ` [PATCH v3 4/5] drm/i915/dg2: Add Wa_16013000631 Matt Roper
2021-12-02 22:57   ` [Intel-gfx] " Clint Taylor
2021-11-16 17:48 ` [PATCH v3 5/5] drm/i915/dg2: extend Wa_1409120013 to DG2 Matt Roper
2021-11-17 18:43   ` [Intel-gfx] " Ville Syrjälä
2021-11-17 18:51     ` Matt Roper
2021-11-17 19:01       ` Ville Syrjälä
2021-11-17 18:54     ` Ville Syrjälä [this message]
2021-11-19 16:36   ` Souza, Jose
2021-11-19 17:11     ` Matt Roper
2021-12-02 23:00   ` [Intel-gfx] " Clint Taylor

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