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From: Imre Deak <imre.deak@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 12/19] drm/i915/dp: Add DP tunnel atomic state and check BW limit
Date: Mon, 5 Feb 2024 19:52:44 +0200	[thread overview]
Message-ID: <ZcEgbFnnAyHyP24L@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <ZcEIlAB-pM0SSx1C@intel.com>

On Mon, Feb 05, 2024 at 06:11:00PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 23, 2024 at 12:28:43PM +0200, Imre Deak wrote:
> > Add the atomic state during a modeset required to enable the DP tunnel
> > BW allocation mode on links where such a tunnel was detected.
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_atomic.c  |  8 ++++++++
> >  drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_link_bw.c |  5 +++++
> >  3 files changed, 32 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
> > index 96ab37e158995..4236740ede9ed 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> > @@ -260,6 +260,10 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
> >  	if (crtc_state->post_csc_lut)
> >  		drm_property_blob_get(crtc_state->post_csc_lut);
> >  
> > +	if (crtc_state->dp_tunnel_ref.tunnel)
> > +		drm_dp_tunnel_ref_get(old_crtc_state->dp_tunnel_ref.tunnel,
> 
> I'd probably s/old_crtc_state/crtc_state/ here. Same pointer, but
> looks out of place given everyone else just operates on 'crtc_state' 
> here.

Ok, will change that.

> > +					&crtc_state->dp_tunnel_ref);
> 
> Shame we have to have this ref wrapper. But I guess no clean
> way to have a magic tracked pointer type that works like a
> normal pointer in C...

I suppose returning a pointer to a kmalloced drm_dp_tunnel_ref from
drm_tunnel_get() and freeing this in drm_tunnel_put() would be one way,
but that imo defeats the purpose of the tracker information being valid
even after put() (so that ref_tracker can print information about where
a particular reference was already dropped).

> 
> > +
> >  	crtc_state->update_pipe = false;
> >  	crtc_state->update_m_n = false;
> >  	crtc_state->update_lrr = false;
> > @@ -311,6 +315,8 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
> >  
> >  	__drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
> >  	intel_crtc_free_hw_state(crtc_state);
> > +	if (crtc_state->dp_tunnel_ref.tunnel)
> > +		drm_dp_tunnel_ref_put(&crtc_state->dp_tunnel_ref);
> >  	kfree(crtc_state);
> >  }
> >  
> > @@ -346,6 +352,8 @@ void intel_atomic_state_clear(struct drm_atomic_state *s)
> >  	/* state->internal not reset on purpose */
> >  
> >  	state->dpll_set = state->modeset = false;
> > +
> > +	intel_dp_tunnel_atomic_cleanup_inherited_state(state);
> 
> This seems to be in the wrong patch?

Yes, I guess a more logical place is in

[PATCH 14/19] drm/i915/dp: Compute DP tunel BW during encoder state computation

where the state is added, will move it there.

> 
> >  }
> >  
> >  struct intel_crtc_state *
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index b9f985a5e705b..46b27a32c8640 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -33,6 +33,7 @@
> >  #include <linux/string_helpers.h>
> >  
> >  #include <drm/display/drm_dp_helper.h>
> > +#include <drm/display/drm_dp_tunnel.h>
> >  #include <drm/drm_atomic.h>
> >  #include <drm/drm_atomic_helper.h>
> >  #include <drm/drm_atomic_uapi.h>
> > @@ -73,6 +74,7 @@
> >  #include "intel_dp.h"
> >  #include "intel_dp_link_training.h"
> >  #include "intel_dp_mst.h"
> > +#include "intel_dp_tunnel.h"
> >  #include "intel_dpll.h"
> >  #include "intel_dpll_mgr.h"
> >  #include "intel_dpt.h"
> > @@ -4490,6 +4492,8 @@ copy_bigjoiner_crtc_state_modeset(struct intel_atomic_state *state,
> >  	saved_state->crc_enabled = slave_crtc_state->crc_enabled;
> >  
> >  	intel_crtc_free_hw_state(slave_crtc_state);
> > +	if (slave_crtc_state->dp_tunnel_ref.tunnel)
> > +		drm_dp_tunnel_ref_put(&slave_crtc_state->dp_tunnel_ref);
> >  	memcpy(slave_crtc_state, saved_state, sizeof(*slave_crtc_state));
> >  	kfree(saved_state);
> >  
> > @@ -4505,6 +4509,10 @@ copy_bigjoiner_crtc_state_modeset(struct intel_atomic_state *state,
> >  		      &master_crtc_state->hw.adjusted_mode);
> >  	slave_crtc_state->hw.scaling_filter = master_crtc_state->hw.scaling_filter;
> >  
> > +	if (master_crtc_state->dp_tunnel_ref.tunnel)
> > +		drm_dp_tunnel_ref_get(master_crtc_state->dp_tunnel_ref.tunnel,
> > +					&slave_crtc_state->dp_tunnel_ref);
> > +
> >  	copy_bigjoiner_crtc_state_nomodeset(state, slave_crtc);
> >  
> >  	slave_crtc_state->uapi.mode_changed = master_crtc_state->uapi.mode_changed;
> > @@ -4533,6 +4541,13 @@ intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
> >  	/* free the old crtc_state->hw members */
> >  	intel_crtc_free_hw_state(crtc_state);
> >  
> > +	if (crtc_state->dp_tunnel_ref.tunnel) {
> > +		drm_dp_tunnel_atomic_set_stream_bw(&state->base,
> > +						   crtc_state->dp_tunnel_ref.tunnel,
> > +						   crtc->pipe, 0);
> > +		drm_dp_tunnel_ref_put(&crtc_state->dp_tunnel_ref);
> > +	}
> > +
> >  	/* FIXME: before the switch to atomic started, a new pipe_config was
> >  	 * kzalloc'd. Code that depends on any field being zero should be
> >  	 * fixed, so that the crtc_state can be safely duplicated. For now,
> > @@ -5374,6 +5389,10 @@ static int intel_modeset_pipe(struct intel_atomic_state *state,
> >  	if (ret)
> >  		return ret;
> >  
> > +	ret = intel_dp_tunnel_atomic_add_state_for_crtc(state, crtc);
> > +	if (ret)
> > +		return ret;
> > +
> >  	ret = intel_dp_mst_add_topology_state_for_crtc(state, crtc);
> >  	if (ret)
> >  		return ret;
> > diff --git a/drivers/gpu/drm/i915/display/intel_link_bw.c b/drivers/gpu/drm/i915/display/intel_link_bw.c
> > index 9c6d35a405a18..5b539ba996ddf 100644
> > --- a/drivers/gpu/drm/i915/display/intel_link_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_link_bw.c
> > @@ -8,6 +8,7 @@
> >  #include "intel_atomic.h"
> >  #include "intel_display_types.h"
> >  #include "intel_dp_mst.h"
> > +#include "intel_dp_tunnel.h"
> >  #include "intel_fdi.h"
> >  #include "intel_link_bw.h"
> >  
> > @@ -149,6 +150,10 @@ static int check_all_link_config(struct intel_atomic_state *state,
> >  	if (ret)
> >  		return ret;
> >  
> > +	ret = intel_dp_tunnel_atomic_check_link(state, limits);
> > +	if (ret)
> > +		return ret;
> > +
> >  	ret = intel_fdi_atomic_check_link(state, limits);
> >  	if (ret)
> >  		return ret;
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel

  reply	other threads:[~2024-02-05 17:52 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 10:28 [PATCH 00/19] drm/i915: Add Display Port tunnel BW allocation support Imre Deak
2024-01-23 10:28 ` [PATCH 01/19] drm/dp: Add drm_dp_max_dprx_data_rate() Imre Deak
2024-01-26 11:36   ` Ville Syrjälä
2024-01-26 13:28     ` Imre Deak
2024-02-06 20:23       ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 02/19] drm/dp: Add support for DP tunneling Imre Deak
2024-01-31 12:50   ` Hogander, Jouni
2024-01-31 13:58     ` Imre Deak
2024-01-31 16:09   ` Ville Syrjälä
2024-01-31 18:49     ` Imre Deak
2024-02-05 16:13       ` Ville Syrjälä
2024-02-05 17:15         ` Imre Deak
2024-02-05 22:17           ` Ville Syrjälä
2024-02-07 20:02   ` Ville Syrjälä
2024-02-07 20:48     ` Imre Deak
2024-02-07 21:02       ` Imre Deak
2024-02-08 15:18         ` Ville Syrjälä
2024-02-07 22:04       ` Imre Deak
2024-01-23 10:28 ` [PATCH 03/19] drm/i915/dp: Add support to notify MST connectors to retry modesets Imre Deak
2024-01-29 10:36   ` Hogander, Jouni
2024-01-29 11:00     ` Imre Deak
2024-01-23 10:28 ` [PATCH 04/19] drm/i915/dp: Use drm_dp_max_dprx_data_rate() Imre Deak
2024-02-06 20:27   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 05/19] drm/i915/dp: Factor out intel_dp_config_required_rate() Imre Deak
2024-02-06 20:32   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 06/19] drm/i915/dp: Export intel_dp_max_common_rate/lane_count() Imre Deak
2024-02-06 20:34   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 07/19] drm/i915/dp: Factor out intel_dp_update_sink_caps() Imre Deak
2024-02-06 20:35   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 08/19] drm/i915/dp: Factor out intel_dp_read_dprx_caps() Imre Deak
2024-02-06 20:36   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 09/19] drm/i915/dp: Add intel_dp_max_link_data_rate() Imre Deak
2024-02-06 20:37   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 10/19] drm/i915/dp: Add way to get active pipes with syncing commits Imre Deak
2024-01-23 10:28 ` [PATCH 11/19] drm/i915/dp: Add support for DP tunnel BW allocation Imre Deak
2024-02-05 22:47   ` Ville Syrjälä
2024-02-06 11:58     ` Imre Deak
2024-02-06 23:08   ` Ville Syrjälä
2024-02-07 12:09     ` Imre Deak
2024-01-23 10:28 ` [PATCH 12/19] drm/i915/dp: Add DP tunnel atomic state and check BW limit Imre Deak
2024-02-05 16:11   ` Ville Syrjälä
2024-02-05 17:52     ` Imre Deak [this message]
2024-01-23 10:28 ` [PATCH 13/19] drm/i915/dp: Account for tunnel BW limit in intel_dp_max_link_data_rate() Imre Deak
2024-02-06 20:42   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 14/19] drm/i915/dp: Compute DP tunel BW during encoder state computation Imre Deak
2024-02-06 20:44   ` Shankar, Uma
2024-02-06 23:25   ` Ville Syrjälä
2024-02-07 14:25     ` Imre Deak
2024-01-23 10:28 ` [PATCH 15/19] drm/i915/dp: Allocate/free DP tunnel BW in the encoder enable/disable hooks Imre Deak
2024-02-06 20:45   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 16/19] drm/i915/dp: Handle DP tunnel IRQs Imre Deak
2024-01-23 10:28 ` [PATCH 17/19] drm/i915/dp: Call intel_dp_sync_state() always for DDI DP encoders Imre Deak
2024-02-06 20:46   ` Shankar, Uma
2024-01-23 10:28 ` [PATCH 18/19] drm/i915/dp: Suspend/resume DP tunnels Imre Deak
2024-01-31 16:18   ` Ville Syrjälä
2024-01-31 16:59     ` Imre Deak
2024-01-23 10:28 ` [PATCH 19/19] drm/i915/dp: Enable DP tunnel BW allocation mode Imre Deak

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