dri-devel.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Uma Shankar <uma.shankar@intel.com>,
	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
	pekka.paalanen@collabora.com, contact@emersion.fr,
	harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
	sebastian.wick@redhat.com, shashank.sharma@amd.com,
	swati2.sharma@intel.com, alex.hung@amd.com,
	Uma Shankar <uma.shankar@intel.com>
Subject: Re: [v5 11/24] drm/i915/color: Add and attach COLORPIPELINE plane property
Date: Fri, 04 Jul 2025 15:41:03 +0300	[thread overview]
Message-ID: <a02f21ae52d9ebe4c4e2808c945d6990542c2900@intel.com> (raw)
In-Reply-To: <20250702091936.3004854-12-uma.shankar@intel.com>

On Wed, 02 Jul 2025, Uma Shankar <uma.shankar@intel.com> wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>
> Add supported color pipelines and attach it to plane.
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_color.h |  3 ++
>  2 files changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 90ac6530d1a5..363c9590c5c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -4050,6 +4050,48 @@ int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_l
>  	return 0;
>  }
>  
> +int intel_plane_color_init(struct drm_plane *plane)
> +{
> +	struct drm_device *dev = plane->dev;
> +	struct intel_display *display = to_intel_display(dev);
> +	struct drm_property *prop;
> +	struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES];
> +	int len = 0;
> +	int ret;
> +
> +	/* Currently expose pipeline only for HDR planes*/
> +	if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
> +		return 0;
> +
> +	/* Add "Bypass" (i.e. NULL) pipeline */
> +	pipelines[len].type = 0;
> +	pipelines[len].name = "Bypass";
> +	len++;
> +
> +	/* Add pipeline consisting of transfer functions */
> +	ret = intel_plane_tf_pipeline_init(plane, &pipelines[len]);
> +	if (ret)
> +		return ret;
> +	len++;
> +
> +	/* Create COLOR_PIPELINE property and attach */
> +	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC,
> +					"COLOR_PIPELINE",
> +					pipelines, len);
> +	if (!prop)
> +		return -ENOMEM;
> +
> +	plane->color_pipeline_property = prop;
> +
> +	drm_object_attach_property(&plane->base, prop, 0);
> +
> +	/* TODO check if needed */
> +	if (plane->state)
> +		plane->state->color_pipeline = NULL;
> +
> +	return 0;
> +}
> +
>  void intel_color_crtc_init(struct intel_crtc *crtc)
>  {
>  	struct intel_display *display = to_intel_display(crtc);
> diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
> index ce9db761c6e2..c2561b86bb26 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.h
> +++ b/drivers/gpu/drm/i915/display/intel_color.h
> @@ -18,6 +18,8 @@ struct drm_plane;
>  struct drm_prop_enum_list;
>  enum intel_color_block;
>  
> +#define MAX_COLOR_PIPELINES 5

If it does not need to be in the header, it does not belong in the
header.

> +
>  void intel_color_init_hooks(struct intel_display *display);
>  int intel_color_init(struct intel_display *display);
>  void intel_color_crtc_init(struct intel_crtc *crtc);
> @@ -46,5 +48,6 @@ void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
>  struct intel_plane_colorop *intel_colorop_alloc(void);
>  struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id);
>  int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list);
> +int intel_plane_color_init(struct drm_plane *plane);

Maybe this all deserves a separate file, intel_plane_color.[ch] or something?

>  
>  #endif /* __INTEL_COLOR_H__ */

-- 
Jani Nikula, Intel

  reply	other threads:[~2025-07-04 12:41 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-02  9:19 [v5 00/24] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-07-02  9:19 ` [v5 01/24] [NOT FOR REVIEW] drm: AMD series squashed Uma Shankar
2025-07-02  9:19 ` [v5 02/24] drm: Add Color lut range attributes Uma Shankar
2025-10-23  5:25   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 03/24] drm: Add Color ops capability property Uma Shankar
2025-10-28  5:31   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 04/24] drm: Add 1D LUT multi-segmented color op Uma Shankar
2025-10-23  8:11   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 05/24] drm: Define helper to initialize segmented 1D LUT Uma Shankar
2025-10-23  8:27   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 06/24] drm: Add helper to extract lut from struct drm_color_lut_32 Uma Shankar
2025-10-24  4:29   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 07/24] drm/i915: Add identifiers for intel color blocks Uma Shankar
2025-07-04 12:35   ` Jani Nikula
2025-10-23  6:04   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 08/24] drm/i915: Add intel_color_op Uma Shankar
2025-07-04 12:36   ` Jani Nikula
2025-11-05 12:24     ` Borah, Chaitanya Kumar
2025-07-02  9:19 ` [v5 09/24] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-07-04 12:37   ` Jani Nikula
2025-10-27  9:38   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 10/24] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-07-04 12:39   ` Jani Nikula
2025-10-28  4:59   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 11/24] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2025-07-04 12:41   ` Jani Nikula [this message]
2025-10-28  5:13   ` Kandpal, Suraj
2025-11-05 12:25     ` Borah, Chaitanya Kumar
2025-07-02  9:19 ` [v5 12/24] drm/i915/color: Add framework to program CSC Uma Shankar
2025-10-28  8:09   ` Kandpal, Suraj
2025-10-28  8:12     ` Kandpal, Suraj
2025-11-05 12:25       ` Borah, Chaitanya Kumar
2025-11-05 12:25     ` Borah, Chaitanya Kumar
2025-07-02  9:19 ` [v5 13/24] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2025-07-04 12:42   ` Jani Nikula
2025-07-02  9:19 ` [v5 14/24] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2025-07-02  9:19 ` [v5 15/24] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-07-02  9:19 ` [v5 16/24] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2025-10-28  8:16   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 17/24] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-10-23  6:22   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 18/24] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-07-02  9:19 ` [v5 19/24] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-10-23  6:25   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 20/24] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-10-23  6:28   ` Kandpal, Suraj
2025-11-05 12:26     ` Borah, Chaitanya Kumar
2025-10-28  8:25   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 21/24] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-10-28  8:29   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 22/24] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-07-02  9:19 ` [v5 23/24] drm/i915/color: Create color pipeline with multisegmented LUT Uma Shankar
2025-10-28  8:31   ` Kandpal, Suraj
2025-07-02  9:19 ` [v5 24/24] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a02f21ae52d9ebe4c4e2808c945d6990542c2900@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=alex.hung@amd.com \
    --cc=chaitanya.kumar.borah@intel.com \
    --cc=contact@emersion.fr \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=harry.wentland@amd.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=jadahl@redhat.com \
    --cc=mwen@igalia.com \
    --cc=pekka.paalanen@collabora.com \
    --cc=sebastian.wick@redhat.com \
    --cc=shashank.sharma@amd.com \
    --cc=swati2.sharma@intel.com \
    --cc=uma.shankar@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).