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d="scan'208";a="154999813" Received: from vpanait-mobl.ger.corp.intel.com (HELO localhost) ([10.245.246.102]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jul 2025 05:41:06 -0700 From: Jani Nikula To: Uma Shankar , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com, pekka.paalanen@collabora.com, contact@emersion.fr, harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com, sebastian.wick@redhat.com, shashank.sharma@amd.com, swati2.sharma@intel.com, alex.hung@amd.com, Uma Shankar Subject: Re: [v5 11/24] drm/i915/color: Add and attach COLORPIPELINE plane property In-Reply-To: <20250702091936.3004854-12-uma.shankar@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20250702091936.3004854-1-uma.shankar@intel.com> <20250702091936.3004854-12-uma.shankar@intel.com> Date: Fri, 04 Jul 2025 15:41:03 +0300 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Wed, 02 Jul 2025, Uma Shankar wrote: > From: Chaitanya Kumar Borah > > Add supported color pipelines and attach it to plane. > > Signed-off-by: Chaitanya Kumar Borah > Signed-off-by: Uma Shankar > --- > drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_color.h | 3 ++ > 2 files changed, 45 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c > index 90ac6530d1a5..363c9590c5c1 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -4050,6 +4050,48 @@ int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_l > return 0; > } > > +int intel_plane_color_init(struct drm_plane *plane) > +{ > + struct drm_device *dev = plane->dev; > + struct intel_display *display = to_intel_display(dev); > + struct drm_property *prop; > + struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES]; > + int len = 0; > + int ret; > + > + /* Currently expose pipeline only for HDR planes*/ > + if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id)) > + return 0; > + > + /* Add "Bypass" (i.e. NULL) pipeline */ > + pipelines[len].type = 0; > + pipelines[len].name = "Bypass"; > + len++; > + > + /* Add pipeline consisting of transfer functions */ > + ret = intel_plane_tf_pipeline_init(plane, &pipelines[len]); > + if (ret) > + return ret; > + len++; > + > + /* Create COLOR_PIPELINE property and attach */ > + prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, > + "COLOR_PIPELINE", > + pipelines, len); > + if (!prop) > + return -ENOMEM; > + > + plane->color_pipeline_property = prop; > + > + drm_object_attach_property(&plane->base, prop, 0); > + > + /* TODO check if needed */ > + if (plane->state) > + plane->state->color_pipeline = NULL; > + > + return 0; > +} > + > void intel_color_crtc_init(struct intel_crtc *crtc) > { > struct intel_display *display = to_intel_display(crtc); > diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h > index ce9db761c6e2..c2561b86bb26 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.h > +++ b/drivers/gpu/drm/i915/display/intel_color.h > @@ -18,6 +18,8 @@ struct drm_plane; > struct drm_prop_enum_list; > enum intel_color_block; > > +#define MAX_COLOR_PIPELINES 5 If it does not need to be in the header, it does not belong in the header. > + > void intel_color_init_hooks(struct intel_display *display); > int intel_color_init(struct intel_display *display); > void intel_color_crtc_init(struct intel_crtc *crtc); > @@ -46,5 +48,6 @@ void intel_color_assert_luts(const struct intel_crtc_state *crtc_state); > struct intel_plane_colorop *intel_colorop_alloc(void); > struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id); > int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list); > +int intel_plane_color_init(struct drm_plane *plane); Maybe this all deserves a separate file, intel_plane_color.[ch] or something? > > #endif /* __INTEL_COLOR_H__ */ -- Jani Nikula, Intel