From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
To: swati2.sharma@intel.com, dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
Date: Fri, 11 Jan 2019 14:47:17 +0200 [thread overview]
Message-ID: <a1e2d29f-ef2f-5359-5d78-1823f4b2535d@gmail.com> (raw)
In-Reply-To: <1547184640-2100-2-git-send-email-swati2.sharma@intel.com>
On 11.1.2019 7.30, swati2.sharma@intel.com wrote:
> From: Swati Sharma <swati2.sharma@intel.com>
>
> The following pixel formats are packed format that follows 4:2:2
> chroma sampling. For memory represenation each component is
> allocated 16 bits each. Thus each pixel occupies 32bit.
>
> Y210: For each component, valid data occupies MSB 10 bits.
> LSB 6 bits are filled with zeroes.
> Y212: For each component, valid data occupies MSB 12 bits.
> LSB 4 bits are filled with zeroes.
> Y216: For each component valid data occupies 16 bits,
> doesn't require any padding bits.
>
> First 16 bits stores the Y value and the next 16 bits stores one
> of the chroma samples alternatively. The first luma sample will
> be accompanied by first U sample and second luma sample is
> accompanied by the first V sample.
>
> The following pixel formats are packed format that follows 4:4:4
> chroma sampling. Channels are arranged in the order UYVA in
> increasing memory order.
>
> Y410: Each color component occupies 10 bits and X component
> takes 2 bits, thus each pixel occupies 32 bits.
> Y412: Each color component is 16 bits where valid data
> occupies MSB 12 bits. LSB 4 bits are filled with zeroes.
> Thus, each pixel occupies 64 bits.
> Y416: Each color component occupies 16 bits for valid data,
> doesn't require any padding bits. Thus, each pixel
> occupies 64 bits.
>
> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> ---
> drivers/gpu/drm/drm_fourcc.c | 6 ++++++
> include/uapi/drm/drm_fourcc.h | 18 +++++++++++++++++-
> 2 files changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index d90ee03..639ab93 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -226,6 +226,12 @@ const struct drm_format_info *__drm_format_info(u32 format)
> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
> .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 0b44260..97249a5 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -151,7 +151,23 @@
> #define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
>
> #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
> -#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
> +#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
> +
> +/*
> + * packed Y2xx indicate for each component, xx valid data occupy msb
> + * 16-xx padding occupy lsb
> + */
> +#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian */
> +#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian */
> +
> +/*
> + * packed Y4xx indicate for each component, xx valid data occupy msb
> + * 16-xx padding occupy lsb except Y410
> + */
> +#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
> +#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [64:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [64:0] X:V:Y:U 16:16:16:16 little endian */
^^
[63:0] maybe?
/Juha-Pekka
>
> /*
> * packed YCbCr420 2x2 tiled formats
>
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next prev parent reply other threads:[~2019-01-11 12:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-11 5:30 [PATCH 0/3] Enable Y2xx and Y4xx (xx:10/12/16 bits) packed formats for ICL swati2.sharma
2019-01-11 5:30 ` [PATCH 1/3] drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc swati2.sharma
2019-01-11 12:47 ` Juha-Pekka Heikkila [this message]
2019-01-11 12:54 ` Sharma, Swati2
2019-01-11 5:30 ` [PATCH 2/3] drm/i915/icl: Add Y2xx and Y4xx (xx:10/12/16) plane control definitions swati2.sharma
2019-01-11 12:53 ` Juha-Pekka Heikkila
2019-01-11 5:30 ` [PATCH 3/3] drm/i915/icl: Enabling Y2xx and Y4xx (xx:10/12/16) formats for universal planes swati2.sharma
2019-01-11 13:22 ` Juha-Pekka Heikkila
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