[PATCH 1/2] gpu: nova-core: impl From for u32 for enums used from register!

[PATCH 1/2] gpu: nova-core: impl From for u32 for enums used from register!

[Danilo Krummrich]

Implement From for u32 for all enum types used within the register!()
macro.

This avoids a conflict with [1] as reported in [2].

Cc: Alexandre Courbot <acourbot@nvidia.com>
Cc: Miguel Ojeda <ojeda@kernel.org>
Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
Link: https://lore.kernel.org/all/20250624173114.3be38990@canb.auug.org.au/ [2]
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
---
 drivers/gpu/nova-core/falcon.rs | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index 07be1c30668c..1affffb109ec 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -20,6 +20,16 @@
 mod hal;
 pub(crate) mod sec2;
 
+macro_rules! impl_from_enum_to_u32 {
+    ($enum_type:ty) => {
+        impl From<$enum_type> for u32 {
+            fn from(value: $enum_type) -> Self {
+                value as u32
+            }
+        }
+    };
+}
+
 /// Revision number of a falcon core, used in the [`crate::regs::NV_PFALCON_FALCON_HWCFG1`]
 /// register.
 #[repr(u8)]
@@ -34,6 +44,7 @@ pub(crate) enum FalconCoreRev {
     Rev6 = 6,
     Rev7 = 7,
 }
+impl_from_enum_to_u32!(FalconCoreRev);
 
 // TODO[FPRI]: replace with `FromPrimitive`.
 impl TryFrom<u8> for FalconCoreRev {
@@ -68,6 +79,7 @@ pub(crate) enum FalconCoreRevSubversion {
     Subversion2 = 2,
     Subversion3 = 3,
 }
+impl_from_enum_to_u32!(FalconCoreRevSubversion);
 
 // TODO[FPRI]: replace with `FromPrimitive`.
 impl TryFrom<u8> for FalconCoreRevSubversion {
@@ -102,6 +114,7 @@ pub(crate) enum FalconSecurityModel {
     /// High-Secure: runs signed code with full privileges. Signature is validated by boot ROM.
     Heavy = 3,
 }
+impl_from_enum_to_u32!(FalconSecurityModel);
 
 // TODO[FPRI]: replace with `FromPrimitive`.
 impl TryFrom<u8> for FalconSecurityModel {
@@ -130,6 +143,7 @@ pub(crate) enum FalconModSelAlgo {
     #[default]
     Rsa3k = 1,
 }
+impl_from_enum_to_u32!(FalconModSelAlgo);
 
 // TODO[FPRI]: replace with `FromPrimitive`.
 impl TryFrom<u8> for FalconModSelAlgo {
@@ -151,6 +165,7 @@ pub(crate) enum DmaTrfCmdSize {
     #[default]
     Size256B = 0x6,
 }
+impl_from_enum_to_u32!(DmaTrfCmdSize);
 
 // TODO[FPRI]: replace with `FromPrimitive`.
 impl TryFrom<u8> for DmaTrfCmdSize {
@@ -173,6 +188,7 @@ pub(crate) enum PeregrineCoreSelect {
     /// RISC-V core is active.
     Riscv = 1,
 }
+impl_from_enum_to_u32!(PeregrineCoreSelect);
 
 impl From<bool> for PeregrineCoreSelect {
     fn from(value: bool) -> Self {
@@ -203,6 +219,7 @@ pub(crate) enum FalconFbifTarget {
     /// Non-coherent system memory.
     NoncoherentSysmem = 2,
 }
+impl_from_enum_to_u32!(FalconFbifTarget);
 
 // TODO[FPRI]: replace with `FromPrimitive`.
 impl TryFrom<u8> for FalconFbifTarget {
@@ -229,6 +246,7 @@ pub(crate) enum FalconFbifMemType {
     /// Physical memory addresses.
     Physical = 1,
 }
+impl_from_enum_to_u32!(FalconFbifMemType);
 
 /// Conversion from a single-bit register field.
 impl From<bool> for FalconFbifMemType {

base-commit: 3606620b316c29e3de8ff87b40828c722086a9c9
-- 
2.49.0

[PATCH 2/2] gpu: nova-core: consider `clippy::cast_lossless`

[Danilo Krummrich]

Fix all warnings caused by `clippy::cast_lossless`, which is going to be
enabled by [1].

Cc: Alexandre Courbot <acourbot@nvidia.com>
Cc: Miguel Ojeda <ojeda@kernel.org>
Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
---
 drivers/gpu/nova-core/falcon.rs           | 2 +-
 drivers/gpu/nova-core/falcon/hal/ga102.rs | 2 +-
 drivers/gpu/nova-core/fb/hal/ga100.rs     | 4 ++--
 drivers/gpu/nova-core/fb/hal/tu102.rs     | 2 +-
 drivers/gpu/nova-core/firmware/fwsec.rs   | 2 +-
 drivers/gpu/nova-core/regs.rs             | 8 ++++----
 drivers/gpu/nova-core/vbios.rs            | 8 ++++----
 7 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index 1affffb109ec..1d21ea129890 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -427,7 +427,7 @@ fn dma_wr<F: FalconFirmware<Target = E>>(
                 fw.dma_handle_with_offset(load_offsets.src_start as usize)?,
             ),
         };
-        if dma_start % DMA_LEN as bindings::dma_addr_t > 0 {
+        if dma_start % bindings::dma_addr_t::from(DMA_LEN) > 0 {
             dev_err!(
                 self.dev,
                 "DMA transfer start addresses must be a multiple of {}",
diff --git a/drivers/gpu/nova-core/falcon/hal/ga102.rs b/drivers/gpu/nova-core/falcon/hal/ga102.rs
index 664327f75cf4..0344cd33e6ea 100644
--- a/drivers/gpu/nova-core/falcon/hal/ga102.rs
+++ b/drivers/gpu/nova-core/falcon/hal/ga102.rs
@@ -78,7 +78,7 @@ fn program_brom_ga102<E: FalconEngine>(bar: &Bar0, params: &FalconBromParams) ->
         .set_value(params.pkc_data_offset)
         .write(bar, E::BASE);
     regs::NV_PFALCON2_FALCON_BROM_ENGIDMASK::default()
-        .set_value(params.engine_id_mask as u32)
+        .set_value(u32::from(params.engine_id_mask))
         .write(bar, E::BASE);
     regs::NV_PFALCON2_FALCON_BROM_CURR_UCODE_ID::default()
         .set_ucode_id(params.ucode_id)
diff --git a/drivers/gpu/nova-core/fb/hal/ga100.rs b/drivers/gpu/nova-core/fb/hal/ga100.rs
index 4827721c9860..871c42bf033a 100644
--- a/drivers/gpu/nova-core/fb/hal/ga100.rs
+++ b/drivers/gpu/nova-core/fb/hal/ga100.rs
@@ -11,8 +11,8 @@
 use super::tu102::FLUSH_SYSMEM_ADDR_SHIFT;
 
 pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 {
-    (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08() as u64) << FLUSH_SYSMEM_ADDR_SHIFT
-        | (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40() as u64)
+    u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT
+        | u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40())
             << FLUSH_SYSMEM_ADDR_SHIFT_HI
 }
 
diff --git a/drivers/gpu/nova-core/fb/hal/tu102.rs b/drivers/gpu/nova-core/fb/hal/tu102.rs
index 6f8ae58e9481..b022c781caf4 100644
--- a/drivers/gpu/nova-core/fb/hal/tu102.rs
+++ b/drivers/gpu/nova-core/fb/hal/tu102.rs
@@ -10,7 +10,7 @@
 pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8;
 
 pub(super) fn read_sysmem_flush_page_gm107(bar: &Bar0) -> u64 {
-    (regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08() as u64) << FLUSH_SYSMEM_ADDR_SHIFT
+    u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT
 }
 
 pub(super) fn write_sysmem_flush_page_gm107(bar: &Bar0, addr: u64) -> Result {
diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs
index 047aab76470e..0dff3cfa90af 100644
--- a/drivers/gpu/nova-core/firmware/fwsec.rs
+++ b/drivers/gpu/nova-core/firmware/fwsec.rs
@@ -346,7 +346,7 @@ pub(crate) fn new(
         let desc = bios.fwsec_image().header(dev)?;
         let ucode_signed = if desc.signature_count != 0 {
             let sig_base_img = (desc.imem_load_size + desc.pkc_data_offset) as usize;
-            let desc_sig_versions = desc.signature_versions as u32;
+            let desc_sig_versions = u32::from(desc.signature_versions);
             let reg_fuse_version =
                 falcon.signature_reg_fuse_version(bar, desc.engine_id_mask, desc.ucode_id)?;
             dev_dbg!(
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index 707f87d6828d..e8b8aabce3f3 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -68,7 +68,7 @@ pub(crate) fn chipset(self) -> Result<Chipset> {
 impl NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE {
     /// Returns the usable framebuffer size, in bytes.
     pub(crate) fn usable_fb_size(self) -> u64 {
-        let size = ((self.lower_mag() as u64) << (self.lower_scale() as u64))
+        let size = (u64::from(self.lower_mag()) << u64::from(self.lower_scale()))
             * kernel::sizes::SZ_1M as u64;
 
         if self.ecc_mode_enabled() {
@@ -87,7 +87,7 @@ pub(crate) fn usable_fb_size(self) -> u64 {
 impl NV_PFB_PRI_MMU_WPR2_ADDR_LO {
     /// Returns the lower (inclusive) bound of the WPR2 region.
     pub(crate) fn lower_bound(self) -> u64 {
-        (self.lo_val() as u64) << 12
+        u64::from(self.lo_val()) << 12
     }
 }
 
@@ -100,7 +100,7 @@ impl NV_PFB_PRI_MMU_WPR2_ADDR_HI {
     ///
     /// A value of zero means the WPR2 region is not set.
     pub(crate) fn higher_bound(self) -> u64 {
-        (self.hi_val() as u64) << 12
+        u64::from(self.hi_val()) << 12
     }
 }
 
@@ -158,7 +158,7 @@ impl NV_PDISP_VGA_WORKSPACE_BASE {
     /// Returns the base address of the VGA workspace, or `None` if none exists.
     pub(crate) fn vga_workspace_addr(self) -> Option<u64> {
         if self.status_valid() {
-            Some((self.addr() as u64) << 16)
+            Some(u64::from(self.addr()) << 16)
         } else {
             None
         }
diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs
index feb80c847077..663fc50e8b66 100644
--- a/drivers/gpu/nova-core/vbios.rs
+++ b/drivers/gpu/nova-core/vbios.rs
@@ -494,10 +494,10 @@ fn new(pdev: &pci::Device, data: &[u8]) -> Result<Self> {
         if data.len() >= 30 {
             // Read size_of_block at offset 0x1A.
             size_of_block = Some(
-                (data[29] as u32) << 24
-                    | (data[28] as u32) << 16
-                    | (data[27] as u32) << 8
-                    | (data[26] as u32),
+                u32::from(data[29]) << 24
+                    | u32::from(data[28]) << 16
+                    | u32::from(data[27]) << 8
+                    | u32::from(data[26]),
             );
         }
 
-- 
2.49.0

Re: [PATCH 1/2] gpu: nova-core: impl From for u32 for enums used from register!

[Alexandre Courbot]

On Tue Jun 24, 2025 at 10:23 PM JST, Danilo Krummrich wrote:
> Implement From for u32 for all enum types used within the register!()
> macro.
>
> This avoids a conflict with [1] as reported in [2].
>
> Cc: Alexandre Courbot <acourbot@nvidia.com>
> Cc: Miguel Ojeda <ojeda@kernel.org>
> Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
> Link: https://lore.kernel.org/all/20250624173114.3be38990@canb.auug.org.au/ [2]
> Signed-off-by: Danilo Krummrich <dakr@kernel.org>

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>

Also confirmed that Ampere still successfully probed with this:

Tested-by: Alexandre Courbot <acourbot@nvidia.com>

One small comment and question below.

> ---
>  drivers/gpu/nova-core/falcon.rs | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
> index 07be1c30668c..1affffb109ec 100644
> --- a/drivers/gpu/nova-core/falcon.rs
> +++ b/drivers/gpu/nova-core/falcon.rs
> @@ -20,6 +20,16 @@
>  mod hal;
>  pub(crate) mod sec2;
>  
> +macro_rules! impl_from_enum_to_u32 {
> +    ($enum_type:ty) => {
> +        impl From<$enum_type> for u32 {
> +            fn from(value: $enum_type) -> Self {
> +                value as u32
> +            }
> +        }
> +    };
> +}

We might need some equivalent in other modules as well in the future -
do you think we should move it to the root of the driver, and explain
its purpose with a comment?

I am also thinking that we might want to turn this into a derive macro
in the future, similar to `FromPrimitive` - so maybe a TODO item is
warranted for this. I haven't looked closely at the `FromPrimitive`
patchset yet but it would be neat if we could leverage it somehow.

Re: [PATCH 2/2] gpu: nova-core: consider `clippy::cast_lossless`

[Alexandre Courbot]

On Tue Jun 24, 2025 at 10:23 PM JST, Danilo Krummrich wrote:
> Fix all warnings caused by `clippy::cast_lossless`, which is going to be
> enabled by [1].
>
> Cc: Alexandre Courbot <acourbot@nvidia.com>
> Cc: Miguel Ojeda <ojeda@kernel.org>
> Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
> Signed-off-by: Danilo Krummrich <dakr@kernel.org>

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>

Also confirmed that Ampere still successfully probed with this:

Tested-by: Alexandre Courbot <acourbot@nvidia.com>

Thank you!

Re: [PATCH 1/2] gpu: nova-core: impl From for u32 for enums used from register!

[Danilo Krummrich]

On Tue, Jun 24, 2025 at 10:48:57PM +0900, Alexandre Courbot wrote:
> On Tue Jun 24, 2025 at 10:23 PM JST, Danilo Krummrich wrote:
> > Implement From for u32 for all enum types used within the register!()
> > macro.
> >
> > This avoids a conflict with [1] as reported in [2].
> >
> > Cc: Alexandre Courbot <acourbot@nvidia.com>
> > Cc: Miguel Ojeda <ojeda@kernel.org>
> > Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
> > Link: https://lore.kernel.org/all/20250624173114.3be38990@canb.auug.org.au/ [2]
> > Signed-off-by: Danilo Krummrich <dakr@kernel.org>
> 
> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
> 
> Also confirmed that Ampere still successfully probed with this:
> 
> Tested-by: Alexandre Courbot <acourbot@nvidia.com>
> 
> One small comment and question below.
> 
> > ---
> >  drivers/gpu/nova-core/falcon.rs | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
> > index 07be1c30668c..1affffb109ec 100644
> > --- a/drivers/gpu/nova-core/falcon.rs
> > +++ b/drivers/gpu/nova-core/falcon.rs
> > @@ -20,6 +20,16 @@
> >  mod hal;
> >  pub(crate) mod sec2;
> >  
> > +macro_rules! impl_from_enum_to_u32 {
> > +    ($enum_type:ty) => {
> > +        impl From<$enum_type> for u32 {
> > +            fn from(value: $enum_type) -> Self {
> > +                value as u32
> > +            }
> > +        }
> > +    };
> > +}
> 
> We might need some equivalent in other modules as well in the future -
> do you think we should move it to the root of the driver, and explain
> its purpose with a comment?

Let's do that once we need it in other modules.

> I am also thinking that we might want to turn this into a derive macro
> in the future, similar to `FromPrimitive` - so maybe a TODO item is
> warranted for this. I haven't looked closely at the `FromPrimitive`
> patchset yet but it would be neat if we could leverage it somehow.

This sounds exactly like what IntoPrimitive does. So, yes, I can add a comment
to replace the macro with IntoPrimitive in the future.

Re: [PATCH 1/2] gpu: nova-core: impl From for u32 for enums used from register!

[Danilo Krummrich]

On Tue, Jun 24, 2025 at 03:23:22PM +0200, Danilo Krummrich wrote:
> Implement From for u32 for all enum types used within the register!()
> macro.
> 
> This avoids a conflict with [1] as reported in [2].
> 
> Cc: Alexandre Courbot <acourbot@nvidia.com>
> Cc: Miguel Ojeda <ojeda@kernel.org>
> Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
> Link: https://lore.kernel.org/all/20250624173114.3be38990@canb.auug.org.au/ [2]
> Signed-off-by: Danilo Krummrich <dakr@kernel.org>

Applied to nova-next, thanks!

Re: [PATCH 2/2] gpu: nova-core: consider `clippy::cast_lossless`

[Danilo Krummrich]

On Tue, Jun 24, 2025 at 03:23:23PM +0200, Danilo Krummrich wrote:
> Fix all warnings caused by `clippy::cast_lossless`, which is going to be
> enabled by [1].
> 
> Cc: Alexandre Courbot <acourbot@nvidia.com>
> Cc: Miguel Ojeda <ojeda@kernel.org>
> Link: https://lore.kernel.org/r/20250615-ptr-as-ptr-v12-5-f43b024581e8@gmail.com [1]
> Signed-off-by: Danilo Krummrich <dakr@kernel.org>

Applied to nova-next, thanks!