From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: Questions about libdrm_intel and way to share physical memory between CPU and GPU Date: Sat, 28 May 2011 09:54:01 +0100 Message-ID: References: <5812F7DC54903547874AA228AE9C46AB7D8957F8@orsmsx504.amr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B412C9E754 for ; Sat, 28 May 2011 01:54:05 -0700 (PDT) In-Reply-To: <5812F7DC54903547874AA228AE9C46AB7D8957F8@orsmsx504.amr.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: "Segovia, Benjamin" , "dri-devel@lists.freedesktop.org" List-Id: dri-devel@lists.freedesktop.org On Fri, 27 May 2011 14:37:45 -0700, "Segovia, Benjamin" wrote: > Hello gurus, > > I have two question mostly regarding libdrm_intel > > 1/ What is the difference between drm_intel_bo_map and drm_intel_gem_bo_map_gtt ? bo_map uses the CPU domain, and so is CPU linear (needs sw detiling). bo_gtt_map uses the uncached [WC] GTT domain, and so is GPU linear (detiling is performed by the hardware using a fence). > 2/ Will it be possible (or is it already possible) to directly share a regularly allocated piece of physical memory? Typical use case is the following one using OpenCL API: Yes. I've proposed a vmap interface to bind user-pages into the GTT, similar to a completely unused bit of TTM functionality. -Chris -- Chris Wilson, Intel Open Source Technology Centre