From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87235FF8867 for ; Wed, 29 Apr 2026 12:31:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E411510E389; Wed, 29 Apr 2026 12:31:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=arm.com header.i=@arm.com header.b="f95CM0td"; dkim-atps=neutral Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by gabe.freedesktop.org (Postfix) with ESMTP id DBFF210E389 for ; Wed, 29 Apr 2026 12:31:11 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0B8EC2A68 for ; Wed, 29 Apr 2026 05:31:06 -0700 (PDT) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3DC943F763 for ; Wed, 29 Apr 2026 05:31:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1777465871; bh=27iqu5paiKAyhxF/wlVcQQaq58dzy4wowov1IK9WIZU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=f95CM0tdUm43b2Whb+U7VlcvI5OnKpPG+9FlxuvsTeAZ4cJS80+pnA1pqK6PwI4i8 tl0rSU89I73C+esI3mKZg0oFwg5WZxXFKrgolQMtfAyO3fC6LDWJTziBOGB/CsfiZC T3ADUMougRti/LbiU77Rmw4+vM3Oyh4YzTgDxuuU= Date: Wed, 29 Apr 2026 13:31:02 +0100 From: Liviu Dudau To: Boris Brezillon Cc: Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/10] drm/panthor: Move the register accessors before the IRQ helpers Message-ID: References: <20260429-panthor-signal-from-irq-v1-0-4b92ae4142d2@collabora.com> <20260429-panthor-signal-from-irq-v1-2-4b92ae4142d2@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260429-panthor-signal-from-irq-v1-2-4b92ae4142d2@collabora.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Wed, Apr 29, 2026 at 11:38:29AM +0200, Boris Brezillon wrote: > We're about to add an IRQ inline helper using gpu_read(). Move things > around to avoid forward declarations. > > No functional changes. > > Signed-off-by: Boris Brezillon Reviewed-by: Liviu Dudau Best regards, Liviu > --- > drivers/gpu/drm/panthor/panthor_device.h | 142 +++++++++++++++---------------- > 1 file changed, 71 insertions(+), 71 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h > index 3f91ba73829d..768fc1992368 100644 > --- a/drivers/gpu/drm/panthor/panthor_device.h > +++ b/drivers/gpu/drm/panthor/panthor_device.h > @@ -495,6 +495,77 @@ panthor_exception_is_fault(u32 exception_code) > const char *panthor_exception_name(struct panthor_device *ptdev, > u32 exception_code); > > +static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data) > +{ > + writel(data, iomem + reg); > +} > + > +static inline u32 gpu_read(void __iomem *iomem, u32 reg) > +{ > + return readl(iomem + reg); > +} > + > +static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg) > +{ > + return readl_relaxed(iomem + reg); > +} > + > +static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) > +{ > + gpu_write(iomem, reg, lower_32_bits(data)); > + gpu_write(iomem, reg + 4, upper_32_bits(data)); > +} > + > +static inline u64 gpu_read64(void __iomem *iomem, u32 reg) > +{ > + return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32)); > +} > + > +static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg) > +{ > + return (gpu_read_relaxed(iomem, reg) | > + ((u64)gpu_read_relaxed(iomem, reg + 4) << 32)); > +} > + > +static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg) > +{ > + u32 lo, hi1, hi2; > + do { > + hi1 = gpu_read(iomem, reg + 4); > + lo = gpu_read(iomem, reg); > + hi2 = gpu_read(iomem, reg + 4); > + } while (hi1 != hi2); > + return lo | ((u64)hi2 << 32); > +} > + > +#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > + read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false, \ > + iomem, reg) > + > +#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us, \ > + false, iomem, reg) > + > +#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > + read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \ > + iomem, reg) > + > +#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \ > + false, iomem, reg) > + > +#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us, \ > + timeout_us, false, iomem, reg) > + > +#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us, \ > + false, iomem, reg) > + > #define INT_RAWSTAT 0x0 > #define INT_CLEAR 0x4 > #define INT_MASK 0x8 > @@ -629,75 +700,4 @@ static inline void panthor_ ## __name ## _irq_disable_events(struct panthor_irq > > extern struct workqueue_struct *panthor_cleanup_wq; > > -static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data) > -{ > - writel(data, iomem + reg); > -} > - > -static inline u32 gpu_read(void __iomem *iomem, u32 reg) > -{ > - return readl(iomem + reg); > -} > - > -static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg) > -{ > - return readl_relaxed(iomem + reg); > -} > - > -static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) > -{ > - gpu_write(iomem, reg, lower_32_bits(data)); > - gpu_write(iomem, reg + 4, upper_32_bits(data)); > -} > - > -static inline u64 gpu_read64(void __iomem *iomem, u32 reg) > -{ > - return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32)); > -} > - > -static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg) > -{ > - return (gpu_read_relaxed(iomem, reg) | > - ((u64)gpu_read_relaxed(iomem, reg + 4) << 32)); > -} > - > -static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg) > -{ > - u32 lo, hi1, hi2; > - do { > - hi1 = gpu_read(iomem, reg + 4); > - lo = gpu_read(iomem, reg); > - hi2 = gpu_read(iomem, reg + 4); > - } while (hi1 != hi2); > - return lo | ((u64)hi2 << 32); > -} > - > -#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > - read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false, \ > - iomem, reg) > - > -#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us, \ > - false, iomem, reg) > - > -#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > - read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \ > - iomem, reg) > - > -#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \ > - false, iomem, reg) > - > -#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us, \ > - timeout_us, false, iomem, reg) > - > -#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us, \ > - false, iomem, reg) > - > #endif > > -- > 2.53.0 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯