[PATCH 0/2] qaic fixes for 6.7

[PATCH 0/2] qaic fixes for 6.7

[Jeffrey Hugo]

A pair of fixes to the driver. First one is an improvement to dma_buf
handling based on a greater understanding of that framework. The second
is a reliability fix that allows some cards to boot.

Jeffrey Hugo (1):
  accel/qaic: Implement quirk for SOC_HW_VERSION

Pranjal Ramajor Asha Kanojiya (1):
  accel/qaic: Fix GEM import path code

 drivers/accel/qaic/mhi_controller.c | 15 ++++++++++++++-
 drivers/accel/qaic/qaic_data.c      |  6 ++----
 2 files changed, 16 insertions(+), 5 deletions(-)

-- 
2.34.1

[PATCH 1/2] accel/qaic: Fix GEM import path code

[Jeffrey Hugo]

From: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>

Do not modify the size of dmabuf as it is immutable.

Fixes: ff13be830333 ("accel/qaic: Add datapath")
Signed-off-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
---
 drivers/accel/qaic/qaic_data.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/accel/qaic/qaic_data.c b/drivers/accel/qaic/qaic_data.c
index 4a8e43a7a6a4..d42f002bc0cf 100644
--- a/drivers/accel/qaic/qaic_data.c
+++ b/drivers/accel/qaic/qaic_data.c
@@ -777,7 +777,6 @@ struct drm_gem_object *qaic_gem_prime_import(struct drm_device *dev, struct dma_
 	struct dma_buf_attachment *attach;
 	struct drm_gem_object *obj;
 	struct qaic_bo *bo;
-	size_t size;
 	int ret;
 
 	bo = qaic_alloc_init_bo();
@@ -795,13 +794,12 @@ struct drm_gem_object *qaic_gem_prime_import(struct drm_device *dev, struct dma_
 		goto attach_fail;
 	}
 
-	size = PAGE_ALIGN(attach->dmabuf->size);
-	if (size == 0) {
+	if (!attach->dmabuf->size) {
 		ret = -EINVAL;
 		goto size_align_fail;
 	}
 
-	drm_gem_private_object_init(dev, obj, size);
+	drm_gem_private_object_init(dev, obj, attach->dmabuf->size);
 	/*
 	 * skipping dma_buf_map_attachment() as we do not know the direction
 	 * just yet. Once the direction is known in the subsequent IOCTL to
-- 
2.34.1

[PATCH 2/2] accel/qaic: Implement quirk for SOC_HW_VERSION

[Jeffrey Hugo]

The SOC_HW_VERSION register in the BHI space is not correctly initialized
by the device and in many cases contains uninitialized data. The register
could contain 0xFFFFFFFF which is a special value to indicate a link
error in PCIe, therefore if observed, we could incorrectly think the
device is down.

Intercept reads for this register, and provide the correct value - every
production instance would read 0x60110200 if the device was operating as
intended.

Fixes: a36bf7af868b ("accel/qaic: Add MHI controller")
Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
---
 drivers/accel/qaic/mhi_controller.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/accel/qaic/mhi_controller.c b/drivers/accel/qaic/mhi_controller.c
index 5036e58e7235..1405623b03e4 100644
--- a/drivers/accel/qaic/mhi_controller.c
+++ b/drivers/accel/qaic/mhi_controller.c
@@ -404,8 +404,21 @@ static struct mhi_controller_config aic100_config = {
 
 static int mhi_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out)
 {
-	u32 tmp = readl_relaxed(addr);
+	u32 tmp;
 
+	/*
+	 * SOC_HW_VERSION quirk
+	 * The SOC_HW_VERSION register (offset 0x224) is not reliable and
+	 * may contain uninitialized values, including 0xFFFFFFFF. This could
+	 * cause a false positive link down error.  Instead, intercept any
+	 * reads and provide the correct value of the register.
+	 */
+	if (addr - mhi_cntrl->regs == 0x224) {
+		*out = 0x60110200;
+		return 0;
+	}
+
+	tmp = readl_relaxed(addr);
 	if (tmp == U32_MAX)
 		return -EIO;
 
-- 
2.34.1

Re: [PATCH 1/2] accel/qaic: Fix GEM import path code

[Jacek Lawrynowicz]

Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>

On 08.12.2023 17:31, Jeffrey Hugo wrote:
> From: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
> 
> Do not modify the size of dmabuf as it is immutable.
> 
> Fixes: ff13be830333 ("accel/qaic: Add datapath")
> Signed-off-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
> ---
>  drivers/accel/qaic/qaic_data.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/accel/qaic/qaic_data.c b/drivers/accel/qaic/qaic_data.c
> index 4a8e43a7a6a4..d42f002bc0cf 100644
> --- a/drivers/accel/qaic/qaic_data.c
> +++ b/drivers/accel/qaic/qaic_data.c
> @@ -777,7 +777,6 @@ struct drm_gem_object *qaic_gem_prime_import(struct drm_device *dev, struct dma_
>  	struct dma_buf_attachment *attach;
>  	struct drm_gem_object *obj;
>  	struct qaic_bo *bo;
> -	size_t size;
>  	int ret;
>  
>  	bo = qaic_alloc_init_bo();
> @@ -795,13 +794,12 @@ struct drm_gem_object *qaic_gem_prime_import(struct drm_device *dev, struct dma_
>  		goto attach_fail;
>  	}
>  
> -	size = PAGE_ALIGN(attach->dmabuf->size);
> -	if (size == 0) {
> +	if (!attach->dmabuf->size) {
>  		ret = -EINVAL;
>  		goto size_align_fail;
>  	}
>  
> -	drm_gem_private_object_init(dev, obj, size);
> +	drm_gem_private_object_init(dev, obj, attach->dmabuf->size);
>  	/*
>  	 * skipping dma_buf_map_attachment() as we do not know the direction
>  	 * just yet. Once the direction is known in the subsequent IOCTL to

Re: [PATCH 2/2] accel/qaic: Implement quirk for SOC_HW_VERSION

[Jacek Lawrynowicz]

Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>

On 08.12.2023 17:31, Jeffrey Hugo wrote:
> The SOC_HW_VERSION register in the BHI space is not correctly initialized
> by the device and in many cases contains uninitialized data. The register
> could contain 0xFFFFFFFF which is a special value to indicate a link
> error in PCIe, therefore if observed, we could incorrectly think the
> device is down.
> 
> Intercept reads for this register, and provide the correct value - every
> production instance would read 0x60110200 if the device was operating as
> intended.
> 
> Fixes: a36bf7af868b ("accel/qaic: Add MHI controller")
> Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
> Reviewed-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
> ---
>  drivers/accel/qaic/mhi_controller.c | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/accel/qaic/mhi_controller.c b/drivers/accel/qaic/mhi_controller.c
> index 5036e58e7235..1405623b03e4 100644
> --- a/drivers/accel/qaic/mhi_controller.c
> +++ b/drivers/accel/qaic/mhi_controller.c
> @@ -404,8 +404,21 @@ static struct mhi_controller_config aic100_config = {
>  
>  static int mhi_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out)
>  {
> -	u32 tmp = readl_relaxed(addr);
> +	u32 tmp;
>  
> +	/*
> +	 * SOC_HW_VERSION quirk
> +	 * The SOC_HW_VERSION register (offset 0x224) is not reliable and
> +	 * may contain uninitialized values, including 0xFFFFFFFF. This could
> +	 * cause a false positive link down error.  Instead, intercept any
> +	 * reads and provide the correct value of the register.
> +	 */
> +	if (addr - mhi_cntrl->regs == 0x224) {
> +		*out = 0x60110200;
> +		return 0;
> +	}
> +
> +	tmp = readl_relaxed(addr);
>  	if (tmp == U32_MAX)
>  		return -EIO;
>  

Re: [PATCH 0/2] qaic fixes for 6.7

[Jeffrey Hugo]

On 12/8/2023 9:30 AM, Jeffrey Hugo wrote:
> A pair of fixes to the driver. First one is an improvement to dma_buf
> handling based on a greater understanding of that framework. The second
> is a reliability fix that allows some cards to boot.
> 
> Jeffrey Hugo (1):
>    accel/qaic: Implement quirk for SOC_HW_VERSION
> 
> Pranjal Ramajor Asha Kanojiya (1):
>    accel/qaic: Fix GEM import path code
> 
>   drivers/accel/qaic/mhi_controller.c | 15 ++++++++++++++-
>   drivers/accel/qaic/qaic_data.c      |  6 ++----
>   2 files changed, 16 insertions(+), 5 deletions(-)
> 

Applied to drm-misc-fixes

-Jeff