From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D12A7CA9ED0 for ; Mon, 12 Oct 2026 13:19:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 376A010F0FB; Mon, 12 Oct 2026 13:19:26 +0000 (UTC) Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D6CA10F0F8; Mon, 12 Oct 2026 13:19:19 +0000 (UTC) Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id 7278F411E8; Mon, 12 Oct 2026 13:19:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4437E1F0089B; Mon, 12 Oct 2026 13:19:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791811159; bh=l8F4WlE83w/gzZrKmJrEQ/hWZM/K60nnEHKAMTgjHJA=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=ZRW6XwmNU4pS1UBwDwmzH7Dj6icbWlkneHuKE1wfxjmsQYEqzhgsWMsjhg8rTWsWv AUzRQfsMKXMmlx+METx2RDDHR0l71GYbo52W+t+LAmf04U/scU+gYQzVC/vP3xgKSO 2RnXaF5xfPen5CugsXtz3sFLD8uCAyejLSadFkTHHfhaTOffz4Ag0y/mjM8XuI30nj +/8i/YmmC5VLWWn+wVthiR6FCv1jzmxw2rz7pxVZbEtwPTIL0nJ2PYhyCmyR4YQZq4 osYB/2VEOqpEaKr92HfGAwGADBQu043VEwmQU/4c+aSX31hYriWFo5+nVbzF6ozzF7 JOjsl5zN3oPUQ== Date: Mon, 12 Oct 2026 18:49:05 +0530 From: Manivannan Sadhasivam To: Nabige Aala Cc: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Ritesh Kumar , Mahadevan P Subject: Re: [PATCH 09/17] phy: qcom: edp: Add Nord AUX channel and VCO divider configuration tables Message-ID: References: <20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com> <20260911-nord-drv-dt-v1-9-e25c073cf1b6@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260911-nord-drv-dt-v1-9-e25c073cf1b6@oss.qualcomm.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Fri, Sep 11, 2026 at 09:06:40PM +0530, Nabige Aala wrote: > From: Ritesh Kumar > > Nord requires different AUX channel and VCO divider settings compared > to existing SoCs. Add edp_phy_aux_cfg_nord and edp_phy_vco_div_cfg_nord > with values sourced from HPG Tables 2-1-a and 2-1-b respectively. > > Signed-off-by: Ritesh Kumar > Signed-off-by: Nabige Aala > --- > drivers/phy/qualcomm/phy-qcom-edp.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c > index 373f13b3d6d5..ee0d7f1a90fe 100644 > --- a/drivers/phy/qualcomm/phy-qcom-edp.c > +++ b/drivers/phy/qualcomm/phy-qcom-edp.c > @@ -1508,6 +1508,25 @@ static int qcom_edp_phy_probe(struct platform_device *pdev) > return PTR_ERR_OR_ZERO(phy_provider); > } > > +/* > + * nord AUX config (eDP mode). > + * From HPG Table 2-1-a: edp_phy_aux_bist.csv > + * Index: 0 1 2 3 4 5 6 7 8 9 10 11 12 > + */ > +static const u8 edp_phy_aux_cfg_nord[DP_AUX_CFG_SIZE] = { > + 0x00, 0x13, 0xa4, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03, 0x02, 0x02, 0x04, > +}; > + > +/* > + * nord VCO_DIV config for eDP mode. > + * From HPG Table 2-1-b AUX Clock Settings (eDP mode) - Nominal/Turbo column. > + * Indices: [0]=1620, [1]=2700, [2]=5400, [3]=8100 > + */ > +static const u8 edp_phy_vco_div_cfg_nord[4] = { > + 0x00, 0x00, 0x02, 0x01, > +}; > + >From this patch onwards you are introducing -Wunused* warnings for each patch. You *must not* do that. If logical split is what you are aiming here, I can say that it isn't what you are doing here. Please group Nord SoC support in one patch and keep the preparatory patches separate. - Mani -- மணிவண்ணன் சதாசிவம்