From: Hans de Goede <hdegoede@redhat.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Hans de Goede <j.w.r.degoede@gmail.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel@lists.freedesktop.org,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH] drm/i915/vlv: Add cdclk workaround for DSI
Date: Tue, 19 Dec 2017 21:45:29 +0100 [thread overview]
Message-ID: <bdb9aa38-d4f5-d268-bf23-1a6d6d257129@redhat.com> (raw)
In-Reply-To: <20171219194837.GH10981@intel.com>
Hi,
On 19-12-17 20:48, Ville Syrjälä wrote:
> On Tue, Dec 19, 2017 at 08:31:07PM +0100, Hans de Goede wrote:
>> Hi,
>>
>> I forgot to add a coverletter, anyways what I wanted to put in the
>> coverletter and not in the commit message is a link to a picture of the
>> problem this fixes:
>>
>> https://fedorapeople.org/~jwrdegoede/IMG_20171217_195637.jpg
>>
>> Note the screen is actually a portrait screen, so the picture is the
>> right way up. Beside the obvious left shift with wrap-around of the
>> picture, also all the green in there is supposed to be blue.
>>
>> Another less clear picture is this one:
>>
>> https://fedorapeople.org/~jwrdegoede/IMG_20171217_195507.jpg
>>
>> Again with wrong colors.
>>
>> ###
>>
>> While working on this I also noticed that the pixelclock as
>> the driver gets it from the VBT is not the same as the one the
>> GOP uses, on the tablet in question the VBT says 77000 KHz
>> and the GOP uses (according to the initial readback) 78125 KHz,
>> on another tablet I noticed the VBT saying 78125 KHz, where
>> as the GOP was using 68xxx KHz which came to a refresh-rate
>> of around 60 Hz, where as the VBT value is 69 Hz IIRC.
>>
>> Neither of these cause any actual issue (fixing the pixelclock
>> to match the GOP programmed value does not fix the issue, where
>> as using the GOP cdclk of 333333KHz does).
>
> https://patchwork.freedesktop.org/patch/127189/
>
> I suppose it's unlike that would help here since it's just about the
> overlap in dual link mode, but there could be other fail in the DSI
> clock code.
Yes that is is not applicable to the Vi8 where I'm seeing the
77000 KHz used by GOP vs 78125 KHz used by i915.
Looking at intel_dsi_vbt_init the pclk on the boards where I'm
seeing an inconsistency is just taken directly from mode->clock,
which in turn is simply dvo_timing->clock * 10.
Again: these different pixel-clocks do not seem to be an issue,
I just noticed this too while looking at the problem best seen
here:
https://fedorapeople.org/~jwrdegoede/IMG_20171217_195637.jpg
Regards,
Hans
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next prev parent reply other threads:[~2017-12-19 20:45 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-19 19:21 [PATCH] drm/i915/vlv: Add cdclk workaround for DSI Hans de Goede
2017-12-19 19:31 ` Hans de Goede
2017-12-19 19:48 ` Ville Syrjälä
2017-12-19 20:45 ` Hans de Goede [this message]
2017-12-19 19:42 ` Rodrigo Vivi
2017-12-19 20:38 ` Hans de Goede
2017-12-20 0:02 ` Rodrigo Vivi
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