From mboxrd@z Thu Jan 1 00:00:00 1970
From: bugzilla-daemon@freedesktop.org
Subject: [Bug 102553] Venus PRO R9 M265X amdgpu: Kernel OOPS
si_dpm_set_power_state unable to handle kernel NULL pointer dereference
Date: Sun, 11 Mar 2018 18:51:19 +0000
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Date: Sun, 11 Mar 2018 18:51:19 +0000
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X-Bugzilla-URL: http://bugs.freedesktop.org/
Auto-Submitted: auto-generated
https://bugs.freedesktop.org/show_bug.cgi?id=3D102553
--- Comment #9 from mercuriete ---
my investigations ends in this macro:
drivers/gpu/drm/amd/amdgpu/amdgpu.h
#define amdgpu_set_pcie_lanes(adev, l)
(adev)->asic_funcs->set_pcie_lanes((adev), (l))
then if you see this file:
drivers/gpu/drm/amd/amdgpu/si.c
static const struct amdgpu_asic_funcs si_asic_funcs =3D
{
.read_disabled_bios =3D &si_read_disabled_bios,
.read_bios_from_rom =3D &si_read_bios_from_rom,
.read_register =3D &si_read_register,
.reset =3D &si_asic_reset,
.set_vga_state =3D &si_vga_set_state,
.get_xclk =3D &si_get_xclk,
.set_uvd_clocks =3D &si_set_uvd_clocks,
.set_vce_clocks =3D NULL,
.get_config_memsize =3D &si_get_config_memsize,
};
There are no set_pcie_lanes in that struct
so in this file:
drivers/gpu/drm/amd/amdgpu/si_dpm.c
if (new_lane_width !=3D current_lane_width) {
amdgpu_set_pcie_lanes(adev, new_lane_width);
lane_width =3D amdgpu_get_pcie_lanes(adev);
si_write_smc_soft_register(adev,
SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width);
}
You are jumping to null.
Please answer me soon to know if i am wrong or if i am right.
PS: in radeon the implementation of that functions is in this file:
drivers/gpu/drm/radeon/radeon_asic.c
static struct radeon_asic si_asic =3D {=20
...
...
.pm =3D {
.misc =3D &evergreen_pm_misc,
.prepare =3D &evergreen_pm_prepare,
.finish =3D &evergreen_pm_finish,
.init_profile =3D &sumo_pm_init_profile,
.get_dynpm_state =3D &r600_pm_get_dynpm_state,
.get_engine_clock =3D &radeon_atom_get_engine_clock,
.set_engine_clock =3D &radeon_atom_set_engine_clock,
.get_memory_clock =3D &radeon_atom_get_memory_clock,
.set_memory_clock =3D &radeon_atom_set_memory_clock,
.get_pcie_lanes =3D &r600_get_pcie_lanes,
.set_pcie_lanes =3D &r600_set_pcie_lanes,
.set_clock_gating =3D NULL,
.set_uvd_clocks =3D &si_set_uvd_clocks,
.set_vce_clocks =3D &si_set_vce_clocks,
.get_temperature =3D &si_get_temp,
},
r600_set_pcie_lanes is in this file:
drivers/gpu/drm/radeon/r600.c
void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes)
{
PS2: So sumarizing the problem is in the macro
(adev)->asic_funcs->set_pcie_lanes
that doesn't exists.
Thanks you very much
--=20
You are receiving this mail because:
You are the assignee for the bug.=
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Date: Sun, 11 Mar 2018 18:51:19 +0000
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X-Bugzilla-URL: http://bugs.freedesktop.org/
Auto-Submitted: auto-generated
Commen=
t # 9
on bug 10255=
3
from mercuriete
my investigations ends in this macro:
drivers/gpu/drm/amd/amdgpu/amdgpu.h
#define amdgpu_set_pcie_lanes(adev, l)
(adev)->asic_funcs->set_pcie_lanes((adev), (l))
then if you see this file:
drivers/gpu/drm/amd/amdgpu/si.c
static const struct amdgpu_asic_funcs si_asic_funcs =3D
{
.read_disabled_bios =3D &si_read_disabled_bios,
.read_bios_from_rom =3D &si_read_bios_from_rom,
.read_register =3D &si_read_register,
.reset =3D &si_asic_reset,
.set_vga_state =3D &si_vga_set_state,
.get_xclk =3D &si_get_xclk,
.set_uvd_clocks =3D &si_set_uvd_clocks,
.set_vce_clocks =3D NULL,
.get_config_memsize =3D &si_get_config_memsize,
};
There are no set_pcie_lanes in that struct
so in this file:
drivers/gpu/drm/amd/amdgpu/si_dpm.c
if (new_lane_width !=3D current_lane_width) {
amdgpu_set_pcie_lanes(adev, new_lane_width);
lane_width =3D amdgpu_get_pcie_lanes(adev);
si_write_smc_soft_register(adev,
SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width);
}
You are jumping to null.
Please answer me soon to know if i am wrong or if i am right.
PS: in radeon the implementation of that functions is in this file:
drivers/gpu/drm/radeon/radeon_asic.c
static struct radeon_asic si_asic =3D {=20
...
...
.pm =3D {
.misc =3D &evergreen_pm_misc,
.prepare =3D &evergreen_pm_prepare,
.finish =3D &evergreen_pm_finish,
.init_profile =3D &sumo_pm_init_profile,
.get_dynpm_state =3D &r600_pm_get_dynpm_state,
.get_engine_clock =3D &radeon_atom_get_engine_clock,
.set_engine_clock =3D &radeon_atom_set_engine_clock,
.get_memory_clock =3D &radeon_atom_get_memory_clock,
.set_memory_clock =3D &radeon_atom_set_memory_clock,
.get_pcie_lanes =3D &r600_get_pcie_lanes,
.set_pcie_lanes =3D &r600_set_pcie_lanes,
.set_clock_gating =3D NULL,
.set_uvd_clocks =3D &si_set_uvd_clocks,
.set_vce_clocks =3D &si_set_vce_clocks,
.get_temperature =3D &si_get_temp,
},
r600_set_pcie_lanes is in this file:
drivers/gpu/drm/radeon/r600.c
void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes)
{
PS2: So sumarizing the problem is in the macro
(adev)->asic_funcs->set_pcie_lanes
that doesn't exists.
Thanks you very much
You are receiving this mail because:
- You are the assignee for the bug.
=
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