From mboxrd@z Thu Jan 1 00:00:00 1970
From: bugzilla-daemon@freedesktop.org
Subject: [Bug 106188] Can't successfully set pstates in pp_od_clk_voltage
Date: Mon, 23 Apr 2018 15:04:04 +0000
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https://bugs.freedesktop.org/show_bug.cgi?id=3D106188
--- Comment #1 from Alex Deucher ---
(In reply to tempel.julian from comment #0)
> Hello,
> I specified "amdgpu.ppfeaturemask=3D0xffffffff" as a boot parameter so I =
could
> access "/sys/class/drm/card0/device/pp_od_clk_voltage".
> The pstate table for source and memory clocks looks correct.
>=20
> When I run "echo "s 7 1209 900"
> /sys/class/drm/card0/device/pp_od_clk_voltage", it returns "s 7 1209 900
> /sys/class/drm/card0/device/pp_od_clk_voltage".
> When I run "echo "c" /sys/class/drm/card0/device/pp_od_clk_voltage"
> afterwards, it returns "c /sys/class/drm/card0/device/pp_od_clk_voltage".
>=20
Are you redirecting to the file? Something like the following should work:
echo "s 7 1209 900" > /sys/class/drm/card0/device/pp_od_clk_voltage
> However, the change is not applied. When I do "cat
> /sys/class/drm/card0/device/pp_od_clk_voltage", it still says "7:=20=20=
=20=20=20=20
> 1196Mhz 1006 mV".
> And when I run "watch -n 0.5 cat /sys/kernel/debug/dri/0/amdgpu_pm_info",
> it reports
> " 1196 MHz (SCLK)
> 981 mV (VDDGFX)
> ".
>=20
> Am I making a mistake somewhere or should it work like this?
>=20
> I also tried "echo "manual" >
> /sys/class/drm/card0/device/power_dpm_force_performance_level" and setting
> pstates 5-7, but that didn't help either.
You have to set manual mode before you can manually edit the state. You al=
so
have to be root (or have permission) to write to these files.
> In the documentation, I read that pp_od_clk_voltage should also include
> OD_range, but it's not there for me.
The patch is on the mailing list, but hasn't been committed yet.
https://patchwork.freedesktop.org/patch/217812/
--=20
You are receiving this mail because:
You are the assignee for the bug.=
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Date: Mon, 23 Apr 2018 15:04:03 +0000
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X-Bugzilla-URL: http://bugs.freedesktop.org/
Auto-Submitted: auto-generated
Commen=
t # 1
on bug 10618=
8
from Alex Deucher
(In reply to tempel.julian from comment #0)
> Hello,
> I specified "amdgpu.ppfeaturemask=3D0xffffffff" as a boot pa=
rameter so I could
> access "/sys/class/drm/card0/device/pp_od_clk_voltage".
> The pstate table for source and memory clocks looks correct.
>=20
> When I run "echo "s 7 1209 900"
> /sys/class/drm/card0/device/pp_od_clk_voltage", it returns "=
s 7 1209 900
> /sys/class/drm/card0/device/pp_od_clk_voltage".
> When I run "echo "c" /sys/class/drm/card0/device/pp_od_=
clk_voltage"
> afterwards, it returns "c /sys/class/drm/card0/device/pp_od_clk_v=
oltage".
>
Are you redirecting to the file? Something like the following should work:
echo "s 7 1209 900" > /sys/class/drm/card0/device/pp_od_clk_vo=
ltage
> However, the change is not applied. When I do &q=
uot;cat
> /sys/class/drm/card0/device/pp_od_clk_voltage", it still says &qu=
ot;7:=20=20=20=20=20=20
> 1196Mhz 1006 mV".
> And when I run "watch -n 0.5 cat /sys/kernel/debug/dri/0/amdgpu_=
pm_info",
> it reports
> " 1196 MHz (SCLK)
> 981 mV (VDDGFX)
> ".
>=20
> Am I making a mistake somewhere or should it work like this?
>=20
> I also tried "echo "manual" >
> /sys/class/drm/card0/device/power_dpm_force_performance_level" an=
d setting
> pstates 5-7, but that didn't help either.
You have to set manual mode before you can manually edit the state. You al=
so
have to be root (or have permission) to write to these files.
> In the documentation, I read that pp_od_clk_volt=
age should also include
> OD_range, but it's not there for me.
The patch is on the mailing list, but hasn't been committed yet.
https://patchwo=
rk.freedesktop.org/patch/217812/
You are receiving this mail because:
- You are the assignee for the bug.
=
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