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* [Bug 110347] pp_od_clk_voltage mV cap ignored
@ 2019-04-07 12:01 bugzilla-daemon
  2019-04-07 12:27 ` bugzilla-daemon
                   ` (6 more replies)
  0 siblings, 7 replies; 8+ messages in thread
From: bugzilla-daemon @ 2019-04-07 12:01 UTC (permalink / raw)
  To: dri-devel


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https://bugs.freedesktop.org/show_bug.cgi?id=110347

            Bug ID: 110347
           Summary: pp_od_clk_voltage mV cap ignored
           Product: DRI
           Version: XOrg git
          Hardware: x86-64 (AMD64)
                OS: Linux (All)
            Status: NEW
          Severity: normal
          Priority: medium
         Component: DRM/AMDgpu
          Assignee: dri-devel@lists.freedesktop.org
          Reporter: bednarczyk.pawel@outlook.com

Hi all,

I have a Gigabyte Radeon RX Vega 64 GAMING OC 8GB and I have been playing with
undervolting/overclocking the card for a better performance/power draw ratio.

I have set the voltages/frequency as follows:
https://gist.github.com/Bednar87/eeeee4fea34b03b96b2833e2900d3405 with voltage
capped @ 950V

Now of course prior to doing that I added the amdgpu.ppffeaturemask parameter
to the boot line with value 0xfffd7fff.

Looking at sudo watch -n 0.5 cat /sys/kernel/debug/dri/0/amdgpu_pm_info shows
that the voltage is at 1200mV (VDDGFX). The power draw is also not reduced as
one could expect from undervolting the clocks but instead shoots up to 320W and
maintains this value under stress (50% power limit was also enabled). 

The frequency on the clocks seems to work fine and the settings seem to be
honoured but the voltage value seems to be ignored.

cat /sys/class/drm/card0/device/pp_od_clk_voltage

OD_SCLK:
0:        852Mhz        800mV
1:        991Mhz        825mV
2:       1084Mhz        850mV
3:       1138Mhz        875mV
4:       1250Mhz        900mV
5:       1370Mhz        925mV
6:       1475Mhz        950mV
7:       1575Mhz        950mV
OD_MCLK:
0:        167Mhz        800mV
1:        500Mhz        825mV
2:        800Mhz        865mV
3:       1050Mhz        950mV
OD_RANGE:
SCLK:     852MHz       2400MHz
MCLK:     167MHz       1500MHz
VDDC:     800mV        1200mV

I am on Arch Linux kernel 5.0.6 MESA 19.0.1

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^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-10-23 14:41 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2019-04-07 12:01 [Bug 110347] pp_od_clk_voltage mV cap ignored bugzilla-daemon
2019-04-07 12:27 ` bugzilla-daemon
2019-04-07 18:28 ` bugzilla-daemon
2019-04-07 18:29 ` bugzilla-daemon
2019-04-09 19:39 ` bugzilla-daemon
2019-07-24 17:08 ` bugzilla-daemon
2019-07-24 17:24 ` bugzilla-daemon
2019-10-23 14:41 ` bugzilla-daemon

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