From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 110674] Crashes / Resets From AMDGPU / Radeon VII Date: Sun, 11 Aug 2019 22:31:24 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1185908696==" Return-path: Received: from culpepper.freedesktop.org (culpepper.freedesktop.org [IPv6:2610:10:20:722:a800:ff:fe98:4b55]) by gabe.freedesktop.org (Postfix) with ESMTP id 99F6189F5F for ; Sun, 11 Aug 2019 22:31:24 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1185908696== Content-Type: multipart/alternative; boundary="15655626840.337bA4.6277" Content-Transfer-Encoding: 7bit --15655626840.337bA4.6277 Date: Sun, 11 Aug 2019 22:31:24 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://bugs.freedesktop.org/ Auto-Submitted: auto-generated https://bugs.freedesktop.org/show_bug.cgi?id=3D110674 --- Comment #74 from Sylvain BERTRAND --- Forcing the memory clock and voltage is not enough: the dc[en]x memory requ= ests should be given also the highest priority in the arbiter block. I don't rec= all how it interacts with the dc[en]x watermarks, but they should be "disabled"= or "maxed out". Basically, whatever the 3D/compute/(vcn|vce/uvd) load, the dc[= en]x will always come first (due to the realtime nature of display data transmis= sion to monitors). Oh and of course, the smu/smc should not manage the dc[en]x. = Very probably, there are some smc/smu commands to do that. If the GPU did not crash with dpm disabled as a whole, the proper way to proceed would be to start from there and step by step add dpm features and = see when it starts crashing. It's not a small task since dpm code paths may be scattered all over the code. --=20 You are receiving this mail because: You are the assignee for the bug.= --15655626840.337bA4.6277 Date: Sun, 11 Aug 2019 22:31:24 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://bugs.freedesktop.org/ Auto-Submitted: auto-generated

Comme= nt # 74 on bug 11067= 4 from Sylvain BERTRAND 
Forcing the memory clock and voltage is not enough: the dc[en]=
x memory requests
should be given also the highest priority in the arbiter block. I don't rec=
all
how it interacts with the dc[en]x watermarks, but they should be "disa=
bled" or
"maxed out". Basically, whatever the 3D/compute/(vcn|vce/uvd) loa=
d, the dc[en]x
will always come first (due to the realtime nature of display data transmis=
sion
to monitors). Oh and of course, the smu/smc should not manage the dc[en]x. =
Very
probably, there are some smc/smu commands to do that.

If the GPU did not crash with dpm disabled as a whole, the proper way to
proceed would be to start from there and step by step add dpm features and =
see
when it starts crashing. It's not a small task since dpm code paths may be
scattered all over the code.

You are receiving this mail because:
  • You are the assignee for the bug.
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