From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 26345] [845G] CPU/GPU incoherency Date: Mon, 17 Dec 2012 15:38:29 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0598465254==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id E30BDE61B6 for ; Mon, 17 Dec 2012 07:38:32 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============0598465254== Content-Type: multipart/alternative; boundary="1355758711.303ABfff22.18080"; charset="us-ascii" --1355758711.303ABfff22.18080 Date: Mon, 17 Dec 2012 15:38:31 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=26345 --- Comment #153 from Chris Wilson --- Now in kernel form as well: commit b75e53bac7f4164e1c53a636352faa3d177b4beb Author: Daniel Vetter Date: Sun Dec 16 18:08:07 2012 +0100 drm/i915: Implement workaround for broken CS tlb on i830/845 Now that Chris Wilson demonstrated that the key for stability on early gen 2 is to simple _never_ exchange the physical backing storage of batch buffers I've tried a stab at a kernel solution. Doesn't look too nefarious imho, now that I don't try to be too clever for my own good any more. v2: After discussing the various techniques, we've decided to always blit batches on the suspect devices, but allow userspace to opt out of the kernel workaround assume full responsibility for providing coherent batches. The principal reason is that avoiding the blit does improve performance in a few key microbenchmarks and also in cairo-trace replays. Signed-Off-by: Daniel Vetter Signed-off-by: Chris Wilson -- You are receiving this mail because: You are the assignee for the bug. --1355758711.303ABfff22.18080 Date: Mon, 17 Dec 2012 15:38:31 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"

Comment # 153 on bug 26345 from 
Now in kernel form as well:

commit b75e53bac7f4164e1c53a636352faa3d177b4beb
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sun Dec 16 18:08:07 2012 +0100

    drm/i915: Implement workaround for broken CS tlb on i830/845

    Now that Chris Wilson demonstrated that the key for stability on early
    gen 2 is to simple _never_ exchange the physical backing storage of
    batch buffers I've tried a stab at a kernel solution. Doesn't look too
    nefarious imho, now that I don't try to be too clever for my own good
    any more.

    v2: After discussing the various techniques, we've decided to always blit
    batches on the suspect devices, but allow userspace to opt out of the
    kernel workaround assume full responsibility for providing coherent
    batches. The principal reason is that avoiding the blit does improve
    performance in a few key microbenchmarks and also in cairo-trace
    replays.

    Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

You are receiving this mail because:
  • You are the assignee for the bug.
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