From mboxrd@z Thu Jan 1 00:00:00 1970
From: bugzilla-daemon@freedesktop.org
Subject: [Bug 41265] KMS does not work on Radeon HD6700M
Date: Sat, 04 Aug 2012 16:14:09 +0000
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https://bugs.freedesktop.org/show_bug.cgi?id=41265
--- Comment #20 from Alexander E. Patrakov 2012-08-04 16:14:09 UTC ---
I think that the card does have its BIOS, and the problem is really related to
a misconfigured PCI bridge. Please take this with a grain of salt, as I am not
a kernel hacker.
Some snippets from my dmesg that IMHO confirm this:
(just an interesting line, I didn't try this suggestion)
[ 0.701044] PCI: Using host bridge windows from ACPI; if necessary, use
"pci=nocrs" and report a bug
(here is the Radeon card)
[ 0.722007] pci 0000:16:00.0: [1002:6740] type 00 class 0x030000
[ 0.722073] pci 0000:16:00.0: reg 10: [mem 0xb0000000-0xbfffffff 64bit pref]
[ 0.722125] pci 0000:16:00.0: reg 18: [mem 0xc0200000-0xc021ffff 64bit]
[ 0.722159] pci 0000:16:00.0: reg 20: [io 0x5000-0x50ff]
[ 0.722226] pci 0000:16:00.0: reg 30: [mem 0xfffe0000-0xffffffff pref]
[ 0.722395] pci 0000:16:00.0: supports D1 D2
(and this is the bridge before it)
[ 0.723054] pci 0000:15:03.0: PCI bridge to [bus 16-16]
[ 0.723124] pci 0000:15:03.0: bridge window [io 0x5000-0x5fff]
[ 0.723132] pci 0000:15:03.0: bridge window [mem 0xc0200000-0xc02fffff]
[ 0.723149] pci 0000:15:03.0: bridge window [mem 0xb0000000-0xbfffffff
64bit pref]
(this is vgaarb)
[ 0.743085] vgaarb: device added:
PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
[ 0.743186] vgaarb: device added:
PCI:0000:16:00.0,decodes=io+mem,owns=none,locks=none
[ 0.743265] vgaarb: loaded
[ 0.743313] vgaarb: bridge control possible 0000:16:00.0
[ 0.743367] vgaarb: no bridge control possible 0000:00:02.0
(here the kernel complains about the bug that ultimately leads to unreadability
of the ROM)
[ 0.773497] pci 0000:16:00.0: no compatible bridge window for [mem
0xfffe0000-0xffffffff pref]
(and tries to fix it up? still not good enough)
[ 0.775668] pci 0000:16:00.0: BAR 6: assigned [mem 0xc0240000-0xc025ffff
pref]
[ 0.775745] pci 0000:15:03.0: PCI bridge to [bus 16-16]
[ 0.775805] pci 0000:15:03.0: bridge window [io 0x5000-0x5fff]
[ 0.775872] pci 0000:15:03.0: bridge window [mem 0xc0200000-0xc02fffff]
[ 0.775937] pci 0000:15:03.0: bridge window [mem 0xb0000000-0xbfffffff
64bit pref]
(so we still end up with lost resources)
[ 0.778723] pci_bus 0000:15: resource 0 [io 0x3000-0x5fff]
[ 0.778725] pci_bus 0000:15: resource 1 [mem 0xb0000000-0xc02fffff]
[ 0.778726] pci_bus 0000:15: resource 2 [mem 0xd4400000-0xd44fffff 64bit
pref]
[ 0.778728] pci_bus 0000:16: resource 0 [io 0x5000-0x5fff]
[ 0.778730] pci_bus 0000:16: resource 1 [mem 0xc0200000-0xc02fffff]
[ 0.778731] pci_bus 0000:16: resource 2 [mem 0xb0000000-0xbfffffff 64bit
pref]
So the main question is: why doesn't vgaarb (or who really has this job)
reconfigure the bridge so that radeon can read the ROM?
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