From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 60879] [radeonsi] X11 can't start with acceleration enabled Date: Fri, 02 May 2014 03:25:58 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0747377949==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 51ECC6E46C for ; Thu, 1 May 2014 20:25:58 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============0747377949== Content-Type: multipart/alternative; boundary="1399001158.EC266803.9132"; charset="us-ascii" --1399001158.EC266803.9132 Date: Fri, 2 May 2014 03:25:58 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable https://bugs.freedesktop.org/show_bug.cgi?id=3D60879 --- Comment #78 from Michel D=C3=A4nzer --- (In reply to comment #76) > this should be: >=20 > + for (i =3D 0; i < rdev->config.cik.max_texture_channel_caches; i= ++) > + cgts_tcc_disable &=3D ~(1 << (16 + i)); Why? This is si_gpu_init(). (In reply to comment #75) > Created attachment 98258 [details] [review] > Tahiti Fix [...] >+ WREG32(CGTS_TCC_DISABLE, cgts_tcc_disable); My understanding is that this register indicates which TCCs are not functio= nal. So this line should be replaced by cgts_tcc_disable |=3D RREG32(CGTS_TCC_DISABLE); --=20 You are receiving this mail because: You are the assignee for the bug. --1399001158.EC266803.9132 Date: Fri, 2 May 2014 03:25:58 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Commen= t # 78 on bug 60879<= /a> from Michel D=C3=A4nzer 
(In reply to comment #=
76)
> this should be:
>=20
> +        for (i =3D 0; i < rdev->config.cik.max_texture_channel_=
caches; i++)
> +                cgts_tcc_disable &=3D ~(1 << (16 + i));

Why? This is si_gpu_init().


(In reply to comment #75)
> Created attachment 98258<=
/a> [details] [review] [review]
> Tahiti Fix
[...]
>+        WREG32(CGTS_TCC_DISABLE, cgts_tcc_disabl=
e);

My understanding is that this register indicates which TCCs are not functio=
nal.
So this line should be replaced by

        cgts_tcc_disable |=3D RREG32(CGTS_TCC_DISABLE);

You are receiving this mail because: =20=20=20=20=20=20
  • You are the assignee for the bug.
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