From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 68235] Display freezes after login with kernel 3.11.0-rc5 on Cayman with dpm=1 Date: Thu, 12 Sep 2013 13:26:43 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1634897944==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 6783EE7BDA for ; Thu, 12 Sep 2013 06:26:43 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1634897944== Content-Type: multipart/alternative; boundary="1378992403.30120.32466"; charset="us-ascii" --1378992403.30120.32466 Date: Thu, 12 Sep 2013 13:26:43 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable https://bugs.freedesktop.org/show_bug.cgi?id=3D68235 --- Comment #22 from Alex Deucher --- (In reply to comment #20) > Ok, if I apply the whole suggested patch but the following, it hangs: > @@ -4152,14 +4152,14 @@ int ni_dpm_init(struct radeon_device *rdev) > } > ni_pi->mclk_rtt_mode_threshold =3D eg_pi->mclk_edc_wr_enable_threshold; >=20=20 > - pi->voltage_control =3D > - radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); > + pi->voltage_control =3D false; > +// radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0); >=20=20 > - pi->mvdd_control =3D > - radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0); > + pi->mvdd_control =3D false; > +// radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0); >=20=20 > - eg_pi->vddci_control =3D > - radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0); > + eg_pi->vddci_control =3D false; > +// radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0); >=20=20 > rv770_get_engine_memory_ss(rdev); So does just applying this portion of the patch by itself fix the hang? --=20 You are receiving this mail because: You are the assignee for the bug. --1378992403.30120.32466 Date: Thu, 12 Sep 2013 13:26:43 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Commen= t # 22 on bug 68235<= /a> from Alex Deucher 
(In reply to comment #=
20)
> Ok, if I apply the whole suggested patch but the=
 following, it hangs:
> @@ -4152,14 +4152,14 @@ int ni_dpm_init(struct radeon_=
device *rdev)
>  	}
>  	ni_pi->mclk_rtt_mode_threshold =3D eg_pi->mclk_edc_wr_enable_t=
hreshold;
>=20=20
> -	pi->voltage_control =3D
> -		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
> +	pi->voltage_control =3D false;
> +//		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
>=20=20
> -	pi->mvdd_control =3D
> -		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0);
> +	pi->mvdd_control =3D false;
> +//		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0);
>=20=20
> -	eg_pi->vddci_control =3D
> -		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
> +	eg_pi->vddci_control =3D false;
> +//		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
>=20=20
>  	rv770_get_engine_memory_ss(rdev);

So does just applying this portion of the patch by itself fix the hang?

You are receiving this mail because: =20=20=20=20=20=20
  • You are the assignee for the bug.
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