From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 71647] radeonsi purple tinted colors Date: Fri, 15 Nov 2013 18:22:48 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2066471445==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id C92BDFB9B9 for ; Fri, 15 Nov 2013 10:22:47 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============2066471445== Content-Type: multipart/alternative; boundary="1384539767.C3351.13977"; charset="us-ascii" --1384539767.C3351.13977 Date: Fri, 15 Nov 2013 18:22:47 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=71647 --- Comment #2 from Tom Stellard --- Can you bisect this? It's possible that this commit is responsible: R600/SI: Prefer SALU instructions for bit shift operations All shift operations will be selected as SALU instructions and then if necessary lowered to VALU instructions in the SIFixSGPRCopies pass. This allows us to do more operations on the SALU which will improve performance and is also required for implementing private memory using indirect addressing, since the private memory pointers must stay in the scalar registers. This patch includes some fixes from Matt Arsenault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194625 91177308-0d34-0410-b5e6-96231b3b80d8 -- You are receiving this mail because: You are the assignee for the bug. --1384539767.C3351.13977 Date: Fri, 15 Nov 2013 18:22:47 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"

Comment # 2 on bug 71647 from 
Can you bisect this?  It's possible that this commit is responsible:

    R600/SI: Prefer SALU instructions for bit shift operations

    All shift operations will be selected as SALU instructions and then
    if necessary lowered to VALU instructions in the SIFixSGPRCopies pass.

    This allows us to do more operations on the SALU which will improve
    performance and is also required for implementing private memory
    using indirect addressing, since the private memory pointers must stay
    in the scalar registers.

    This patch includes some fixes from Matt Arsenault.

    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194625
91177308-0d34-0410-b5e6-96231b3b80d8

You are receiving this mail because:
  • You are the assignee for the bug.
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