From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 73378] [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks! Date: Mon, 16 Feb 2015 17:21:49 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1384183653==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 356516E31A for ; Mon, 16 Feb 2015 09:21:49 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1384183653== Content-Type: multipart/alternative; boundary="1424107309.AE6783.24618"; charset="UTF-8" --1424107309.AE6783.24618 Date: Mon, 16 Feb 2015 17:21:49 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=73378 --- Comment #35 from Alex Deucher --- (In reply to Chernovsky Oleg from comment #34) > > Is this some kind of open hardware docs? Or just internal? Maybe I missed > something Just internal. (In reply to Chernovsky Oleg from comment #33) > P.S. I only fear that maybe I launched mmiotrace too late, I did rmmod and > then modprobe fglrx again. Could it setup any registers at the first run? > Because at second it touched UVD only when I launched mpv. To save power the UVD clocks are only raised when it's actually in use. I think fglrx does some low level hw init similar to what we do in radeon, but they don't do a ring test so they probably don't change the UVD plls at driver load time only when UVD is in use (although I'm not 100% sure off hand). -- You are receiving this mail because: You are the assignee for the bug. --1424107309.AE6783.24618 Date: Mon, 16 Feb 2015 17:21:49 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"

Comment # 35 on bug 73378 from 
(In reply to Chernovsky Oleg from comment #34)
> 
> Is this some kind of open hardware docs? Or just internal? Maybe I missed
> something

Just internal.

(In reply to Chernovsky Oleg from comment #33)
> P.S. I only fear that maybe I launched mmiotrace too late, I did rmmod and
> then modprobe fglrx again. Could it setup any registers at the first run?
> Because at second it touched UVD only when I launched mpv.

To save power the UVD clocks are only raised when it's actually in use.  I
think fglrx does some low level hw init similar to what we do in radeon, but
they don't do a ring test so they probably don't change the UVD plls at driver
load time only when UVD is in use (although I'm not 100% sure off hand).

You are receiving this mail because:
  • You are the assignee for the bug.
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