From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 73378] [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks! Date: Wed, 28 Jan 2015 21:43:12 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0898277301==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 4FB206E604 for ; Wed, 28 Jan 2015 13:43:12 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============0898277301== Content-Type: multipart/alternative; boundary="1422481392.C6c06A3.19369"; charset="UTF-8" --1422481392.C6c06A3.19369 Date: Wed, 28 Jan 2015 21:43:12 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=73378 --- Comment #19 from Alex Deucher --- (In reply to Chernovsky Oleg from comment #18) > Hm-m, just tried drm-next-3.20 branch and: > > [ 365.200918] [drm:radeon_uvd_send_upll_ctlreq [radeon]] *ERROR* Timeout > setting UVD clocks! > [ 365.200922] [drm:uvd_v1_0_ib_test [radeon]] *ERROR* radeon: failed to > raise UVD clocks (-110). > [ 365.200928] [drm:radeon_ib_ring_tests [radeon]] *ERROR* radeon: failed > testing IB on ring 5 (-110). > > > Both on cold start and resume from suspend, Pitcairn, Mesa 10.4.3 > Ah yes, the card is factory overclocked (at least box states so) > > It's not very painful for me but if I can help somehow, I'm in I don't think it will make a difference, but you can try limiting the clocks in si_apply_state_adjust_rules(). Take a look at the quirk handling code for how to limit the sclk and mclk. -- You are receiving this mail because: You are the assignee for the bug. --1422481392.C6c06A3.19369 Date: Wed, 28 Jan 2015 21:43:12 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"

Comment # 19 on bug 73378 from 
(In reply to Chernovsky Oleg from comment #18)
> Hm-m, just tried drm-next-3.20 branch and:
> 
> [  365.200918] [drm:radeon_uvd_send_upll_ctlreq [radeon]] *ERROR* Timeout
> setting UVD clocks!
> [  365.200922] [drm:uvd_v1_0_ib_test [radeon]] *ERROR* radeon: failed to
> raise UVD clocks (-110).
> [  365.200928] [drm:radeon_ib_ring_tests [radeon]] *ERROR* radeon: failed
> testing IB on ring 5 (-110).
> 
> 
> Both on cold start and resume from suspend, Pitcairn, Mesa 10.4.3
> Ah yes, the card is factory overclocked (at least box states so)
> 
> It's not very painful for me but if I can help somehow, I'm in

I don't think it will make a difference, but you can try limiting the clocks in
si_apply_state_adjust_rules().  Take a look at the quirk handling code for how
to limit the sclk and mclk.

You are receiving this mail because:
  • You are the assignee for the bug.
--1422481392.C6c06A3.19369-- --===============0898277301== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK --===============0898277301==--