| Priority | medium |
|---|---|
| Bug ID | 73378 |
| Assignee | dri-devel@lists.freedesktop.org |
| Summary | [UVD] uvd cannot enable on my RadeonHD7870 |
| Severity | normal |
| Classification | Unclassified |
| OS | Linux (All) |
| Reporter | at86mouse@gmail.com |
| Hardware | x86-64 (AMD64) |
| Status | NEW |
| Version | unspecified |
| Component | DRM/Radeon |
| Product | DRI |
Created attachment 91631 [details]
linux-x86_64-full-dmesg
I'm try to play video through vdpau , but vainfo shows no h264 VLD codec
detecting.
libva info: VA-API version 0.34.0
libva info: va_getDriverName() returns 0
libva info: User requested driver 'vdpau'
libva info: Trying to open /usr/lib/dri/vdpau_drv_video.so
libva info: Found init function __vaDriverInit_0_33
libva info: va_openDriver() returns 0
vainfo: VA-API version: 0.34 (libva 1.2.1)
vainfo: Driver version: Splitted-Desktop Systems VDPAU backend for VA-API -
0.7.4
vainfo: Supported profile and entrypoints
VAProfileMPEG2Simple : VAEntrypointVLD
VAProfileMPEG2Main : VAEntrypointVLD
env:
LIBVA_DRIVER_NAME=vdpau
VDPAU_DRIVER=radeonsi
The dmesg show me some ib ring test failed, but i don't know how to going on,
even pass (radeon.dpm=0) to kernel as the same error.
[ 5.236963] [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD
clocks!
[ 5.236972] [drm:uvd_v1_0_ib_test] *ERROR* radeon: failed to raise UVD
clocks (-110).
[ 5.236977] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB on
ring 5 (-110).
And this command result that i don't know what its mean:
root@ArchCC /home/atmouse # radeontool regmatch 0x0718
0x0718 0x0000001a (26)
root@ArchCC /home/atmouse # radeontool regmatch 0x071c
0x071c 0xc080001c (-1065353188)
root@ArchCC /home/atmouse # radeontool regmatch 0x0720
0x0720 0x3168680e (828925966)
| What | Removed | Added |
|---|---|---|
| Summary | [UVD] uvd cannot enable on my RadeonHD7870 | [UVD] uvd cannot decode h264 or vc1 on my RadeonHD7870 |
| What | Removed | Added |
|---|---|---|
| Summary | [UVD] uvd cannot decode h264 or vc1 on my RadeonHD7870 | [radeonsi] uvd cannot decode h264 or vc1 on my RadeonHD7870 |
| What | Removed | Added |
|---|---|---|
| Summary | [radeonsi] uvd cannot decode h264 or vc1 on my RadeonHD7870 | [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UV= D clocks! |
Please double check that your hardware isn't overheating. Did you changed anything on the timing parameters (Over-clocking tools etc.= ..)? Cause the clocks for UVD mode look a bit odd.
Created attachment 96253 [details]
full-dmesg
grep for uvd_send
same problem here. UVD is initialised properly but setting clocks timesout.
(In reply to comment #3) > same problem here. UVD is initialised properly but setting clocks timesout. If this is a regression, can you bisect?
01:00.0 VGA compatible controller: Advanced Micro Devices, Inc= . [AMD/ATI] Pitcairn PRO [Radeon HD 7850] 3.14.2-gentoo [ 2.360636] [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks! [ 2.360795] [drm:uvd_v1_0_ib_test] *ERROR* radeon: failed to raise UVD clocks (-110). [ 2.360954] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB= on ring 5 (-110). such fail. wow. also, suspend and resume does not work with 3.13 and 3.14 but works with 3.= 12 but I haz no clue if this has anything to do with radeon but those errors ^^ are present in this bug & latest kernels.
(In reply to comment #5) > > also, suspend and resume does not work with 3.13 and 3.14 but works with > 3.12 but I haz no clue if this has anything to do with radeon but those > errors ^^ are present in this bug & latest kernels. Can you bisect?
> Can you bisect?
Not sure how to do that but if you want to point me to some instructions th=
en
please do.
Basically suspend and resume works with 3.12 kernels but in later kernels I=
can
suspend and then resume once but after that the system does not suspend
anymore.
Created attachment 107749 [details]
lspci of my graphic card
This is a result of "lspci -s 01:00.0 -vvv", showing all the details of my
graphic card.
Created attachment 107750 [details]
dmesg
Full dmesg after a cold boot, showing the UVD error.
Hi, I've got the exact same error, preventing me to use UVD for H264 decoding [ 12.836644] [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off [ 12.878552] [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks! [ 12.878574] [drm:uvd_v1_0_ib_test] *ERROR* radeon: failed to raise UVD clocks (-110). [ 12.878595] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB on ring 5 (-110). I've tried with kernel 3.16-2-amd64 (from Debian testing), kernel 3.12.6 (from Debian backports), the issue is the same. As someone ask for "bisect", I did some google, and it apparently means that I have to find the previous package / library where the problem is not present. I supposed that it's located in libdrm-radeon1, so I tried last available package in sid (2.4.58-2) and back in wheezy (2.4.40-1), but the problem is still present in both version. I'm willing to help to find the root of this issue, and I'm able to do some test (I've spent several hours on this issue already), but I may just need some indication on where to search. Thanks for your help.
I have the same issue with Radeon R9 280X. This happens only on cold boot. I've tried various kernels (3.14, 3.15, 3.17) without success.
| What | Removed | Added |
|---|---|---|
| CC | oyvinds@everdot.org |
Created attac=
hment 111366 [details]
dmesg 3.18.1 with drm debug=3D0x06
[ 6.976062] [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD
clocks!
[ 6.976064] [drm:uvd_v1_0_ib_test] *ERROR* radeon: failed to raise UVD
clocks (-110).
[ 6.976066] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB=
on
ring 5 (-110).
on 3.18.1, could this be because the card is factory overclocked?
[ 5.613512] [drm:radeon_pm_print_states] 4 Power State(s)
[ 5.613512] [drm:radeon_pm_print_states] State 0:=20
[ 5.613513] [drm:radeon_pm_print_states] Default
[ 5.613514] [drm:radeon_pm_print_states] 16 PCIE Lanes
[ 5.613514] [drm:radeon_pm_print_states] 1 Clock Mode(s)
[ 5.613515] [drm:radeon_pm_print_states] 0 e: 860000 m:
1200000 v: 1210
[ 5.613516] [drm:radeon_pm_print_states] State 1: Performance
[ 5.613517] [drm:radeon_pm_print_states] 16 PCIE Lanes
[ 5.613517] [drm:radeon_pm_print_states] 3 Clock Mode(s)
[ 5.613518] [drm:radeon_pm_print_states] 0 e: 300000 m:
500000 v: 825
[ 5.613519] [drm:radeon_pm_print_states] 1 e: 450000 m:
1225000 v: 900
[ 5.613520] [drm:radeon_pm_print_states] 2 e: 1000000 m:
1225000 v: 1210
[ 5.613520] [drm:radeon_pm_print_states] State 2:=20
[ 5.613521] [drm:radeon_pm_print_states] 16 PCIE Lanes
[ 5.613521] [drm:radeon_pm_print_states] 3 Clock Mode(s)
[ 5.613522] [drm:radeon_pm_print_states] 0 e: 450000 m:
1225000 v: 900
[ 5.613522] [drm:radeon_pm_print_states] 1 e: 450000 m:
1225000 v: 900
[ 5.613523] [drm:radeon_pm_print_states] 2 e: 1000000 m:
1225000 v: 1210
[ 5.613524] [drm:radeon_pm_print_states] State 3:=20
[ 5.613524] [drm:radeon_pm_print_states] 1 PCIE Lanes
[ 5.613525] [drm:radeon_pm_print_states] 3 Clock Mode(s)
[ 5.613526] [drm:radeon_pm_print_states] 0 e: 300000 m:
500000 v: 825
[ 5.613526] [drm:radeon_pm_print_states] 1 e: 300000 m:
500000 v: 825
[ 5.613527] [drm:radeon_pm_print_states] 2 e: 300000 m:
500000 v: 825
[ 5.613557] [drm] radeon: power management initialized
(In reply to =C3=96yvind Saether from comment #13) > on 3.18.1, could this be because the card is fac= tory overclocked? Yes, that's possible. If you activate UVD you must downclock the system clo= ck for it to work reliable. Not sure if we have implemented that correctly for= SI.
I can help with code here. What should be implemented, roughly?
(In reply to Christian K=C3=B6nig from comment #14) > (In reply to =C3=96yvind Saether from comment #13) > > on 3.18.1, could this be because the card is factory overclocked? >=20 > Yes, that's possible. If you activate UVD you must downclock the system > clock for it to work reliable. Not sure if we have implemented that > correctly for SI. We already handle it. SI has UVD power states which also include validated sclk and mclk levels that are often different than the performance state. = The driver switches to those states when UVD is used. At driver load time (when the ring and IB tests are done), the hw is still in the boot state (which h= as really low clocks) anyway.
On older versions of the driver we init dpm after everything else, so the ring and ib tests happen before we even touch the dpm hw so clocks are at their low boot up levels. On newer versions of the driver we init dpm early, but we don't enable the non boot states until the end of the init sequence after the ring and ib tests. >>From the log: [ 5.237881] == power state 0 == [ 5.237882] ui class: none [ 5.237883] internal class: boot [ 5.237884] caps: [ 5.237885] uvd vclk: 0 dclk: 0 [ 5.237887] power level 0 sclk: 15000 mclk: 15000 vddc: 900 vddci: 950 pcie gen: 2 [ 5.237887] status: c r b This is the boot state. The clocks are fixed at 150Mhz for both sclk and mclk. [ 5.237889] == power state 1 == [ 5.237890] ui class: performance [ 5.237890] internal class: none [ 5.237891] caps: [ 5.237892] uvd vclk: 0 dclk: 0 [ 5.237893] power level 0 sclk: 30000 mclk: 15000 vddc: 825 vddci: 850 pcie gen: 2 [ 5.237895] power level 1 sclk: 45000 mclk: 120000 vddc: 900 vddci: 975 pcie gen: 2 [ 5.237896] power level 2 sclk: 100000 mclk: 120000 vddc: 1219 vddci: 975 pcie gen: 2 [ 5.237896] status: This is the performance state. The sclk can range from 300 Mhz to 1Ghz and the mclk can range from 150Mhz to 1.2Ghz based on GPU demand. [ 5.237897] == power state 2 == [ 5.237898] ui class: none [ 5.237898] internal class: uvd [ 5.237899] caps: video [ 5.237901] uvd vclk: 72000 dclk: 56000 [ 5.237902] power level 0 sclk: 45000 mclk: 120000 vddc: 900 vddci: 975 pcie gen: 2 [ 5.237903] power level 1 sclk: 45000 mclk: 120000 vddc: 900 vddci: 975 pcie gen: 2 [ 5.237904] power level 2 sclk: 100000 mclk: 120000 vddc: 1219 vddci: 975 pcie gen: 2 [ 5.237905] status: This is the UVD state. As you can see there is a floor of 450Mhz on the sclk to maintain the necessary performance level for post processing and presentation. [ 5.237905] == power state 3 == [ 5.237906] ui class: none [ 5.237907] internal class: ulv [ 5.237908] caps: [ 5.237909] uvd vclk: 0 dclk: 0 [ 5.237910] power level 0 sclk: 30000 mclk: 15000 vddc: 825 vddci: 850 pcie gen: 2 [ 5.237911] power level 1 sclk: 30000 mclk: 15000 vddc: 825 vddci: 850 pcie gen: 2 [ 5.237912] power level 2 sclk: 30000 mclk: 15000 vddc: 825 vddci: 850 pcie gen: 2 This is the ulv state which is only active when the board is completely idle.
(In reply to Alex Deucher from comment #16) > (In reply to Christian K=C3=B6nig from comment #14) > > (In reply to =C3=96yvind Saether from comment #13) > > > on 3.18.1, could this be because the card is factory overclo= cked? > >=20 > > Yes, that's possible. If you activate UVD you must downclock the = system > > clock for it to work reliable. Not sure if we have implemented th= at > > correctly for SI. >=20 > We already handle it. SI has UVD power states which also include vali= dated > sclk and mclk levels that are often different than the performance sta= te.=20 > The driver switches to those states when UVD is used. At driver load = time > (when the ring and IB tests are done), the hw is still in the boot sta= te > (which has really low clocks) anyway. Hm-m, just tried drm-next-3.20 branch and: [ 365.200918] [drm:radeon_uvd_send_upll_ctlreq [radeon]] *ERROR* Timeout setting UVD clocks! [ 365.200922] [drm:uvd_v1_0_ib_test [radeon]] *ERROR* radeon: failed to ra= ise UVD clocks (-110). [ 365.200928] [drm:radeon_ib_ring_tests [radeon]] *ERROR* radeon: failed testing IB on ring 5 (-110). Both on cold start and resume from suspend, Pitcairn, Mesa 10.4.3 Ah yes, the card is factory overclocked (at least box states so) It's not very painful for me but if I can help somehow, I'm in
(In reply to Chernovsky Oleg from comment #18) > Hm-m, just tried drm-next-3.20 branch and: > > [ 365.200918] [drm:radeon_uvd_send_upll_ctlreq [radeon]] *ERROR* Timeout > setting UVD clocks! > [ 365.200922] [drm:uvd_v1_0_ib_test [radeon]] *ERROR* radeon: failed to > raise UVD clocks (-110). > [ 365.200928] [drm:radeon_ib_ring_tests [radeon]] *ERROR* radeon: failed > testing IB on ring 5 (-110). > > > Both on cold start and resume from suspend, Pitcairn, Mesa 10.4.3 > Ah yes, the card is factory overclocked (at least box states so) > > It's not very painful for me but if I can help somehow, I'm in I don't think it will make a difference, but you can try limiting the clocks in si_apply_state_adjust_rules(). Take a look at the quirk handling code for how to limit the sclk and mclk.