Commen=
t # 36
on bug 76564<=
/a>
from Christian K=C3=B6nig
(In reply to comment #=
35)
> (In reply to comment #34)
> > Why not increase the ref_div? hardware frying? That way you can g=
et the
> > clock exactly right.
> >=20
> > For example: 148.5 =3D 100 * 29.7 / 4 * 5
> > 74.2 =3D 100 * 37.1 / 5 * 10
>=20
> Just noticed that the clock values shown by xrandr are already rounded=
. So
> the 74.2MHz for 23.976fps actually is 74.17MHz. This would mean the PL=
L can
> never exactly generate the clock that is requested by the television I=
guess.
>=20
> Perhaps something else is wrong with the PLL then
The PLL is fine, you can't just represent some frequencies 100% correct.
I'm already digging into making more use of the ref divider, just give me s=
ome
time to get the algorithem straight.