From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 76564] [AMD Fusion E-350] HDMI refresh rates doesn't match expectations Date: Tue, 25 Mar 2014 19:55:24 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1542528822==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 80F6D6E3D7 for ; Tue, 25 Mar 2014 12:55:24 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1542528822== Content-Type: multipart/alternative; boundary="1395777324.527F1.20188"; charset="us-ascii" --1395777324.527F1.20188 Date: Tue, 25 Mar 2014 19:55:24 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=76564 --- Comment #10 from Alex Deucher --- (In reply to comment #8) > Okay, but doesnt that mean in this case it is a problem with the display > (HDMI?) clock, as I am not using HDMI audio? > > Is there a way I could get more detailed logging of what is happening on my > system? I don't know how XBMC calculates the frame rate off hand. The PLL used to generate the display clock may not always match the exact pixel clock of the monitor. The driver calculates pll dividers to get as close as possible to the pixel clock of the display mode. See radeon_compute_pll_avivo() in radeon_display.c -- You are receiving this mail because: You are the assignee for the bug. --1395777324.527F1.20188 Date: Tue, 25 Mar 2014 19:55:24 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"

Comment # 10 on bug 76564 from 
(In reply to comment #8)
> Okay, but doesnt that mean in this case it is a problem with the display
> (HDMI?) clock, as I am not using HDMI audio?
> 
> Is there a way I could get more detailed logging of what is happening on my
> system?

I don't know how XBMC calculates the frame rate off hand.  The PLL used to
generate the display clock may not always match the exact pixel clock of the
monitor.  The driver calculates pll dividers to get as close as possible to the
pixel clock of the display mode.  See radeon_compute_pll_avivo() in
radeon_display.c

You are receiving this mail because:
  • You are the assignee for the bug.
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