From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 76564] [AMD Fusion E-350] HDMI refresh rates doesn't match expectations Date: Tue, 25 Mar 2014 20:21:56 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2086542762==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 222FD6E3F4 for ; Tue, 25 Mar 2014 13:21:56 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============2086542762== Content-Type: multipart/alternative; boundary="1395778916.F15dC1.27022"; charset="us-ascii" --1395778916.F15dC1.27022 Date: Tue, 25 Mar 2014 20:21:56 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable https://bugs.freedesktop.org/show_bug.cgi?id=3D76564 --- Comment #12 from Christian K=C3=B6nig --- (In reply to comment #10) > (In reply to comment #8) > > Okay, but doesnt that mean in this case it is a problem with the display > > (HDMI?) clock, as I am not using HDMI audio? > >=20 > > Is there a way I could get more detailed logging of what is happening o= n my > > system? >=20 > I don't know how XBMC calculates the frame rate off hand. The PLL used to > generate the display clock may not always match the exact pixel clock of = the > monitor. The driver calculates pll dividers to get as close as possible = to > the pixel clock of the display mode. See radeon_compute_pll_avivo() in > radeon_display.c Yeah, but on multiple occasions I had the feeling that fglrx might do a bet= ter job on this than the radeon kernel module. We might want to take a second look at this and try to compare the settings fglrx and radeon uses for the same mode. --=20 You are receiving this mail because: You are the assignee for the bug. --1395778916.F15dC1.27022 Date: Tue, 25 Mar 2014 20:21:56 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Commen= t # 12 on bug 76564<= /a> from Christian K=C3=B6nig 
(In reply to comment #=
10)
> (In reply to comment #8)
> > Okay, but doesnt that mean in this case it is a problem with the =
display
> > (HDMI?) clock, as I am not using HDMI audio?
> >=20
> > Is there a way I could get more detailed logging of what is happe=
ning on my
> > system?
>=20
> I don't know how XBMC calculates the frame rate off hand.  The PLL use=
d to
> generate the display clock may not always match the exact pixel clock =
of the
> monitor.  The driver calculates pll dividers to get as close as possib=
le to
> the pixel clock of the display mode.  See radeon_compute_pll_avivo() in
> radeon_display.c

Yeah, but on multiple occasions I had the feeling that fglrx might do a bet=
ter
job on this than the radeon kernel module.

We might want to take a second look at this and try to compare the settings
fglrx and radeon uses for the same mode.

You are receiving this mail because: =20=20=20=20=20=20
  • You are the assignee for the bug.
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