From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 76564] [AMD Fusion E-350] HDMI refresh rates doesn't match expectations Date: Mon, 31 Mar 2014 14:17:08 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1389713659==" Return-path: Received: from culpepper.freedesktop.org (unknown [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id 5D4516E2CE for ; Mon, 31 Mar 2014 07:17:08 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============1389713659== Content-Type: multipart/alternative; boundary="1396275428.6E6eb2.27816"; charset="us-ascii" --1396275428.6E6eb2.27816 Date: Mon, 31 Mar 2014 14:17:08 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" https://bugs.freedesktop.org/show_bug.cgi?id=76564 --- Comment #43 from Alex Deucher --- We could also update the adjusted mode clock to the actual clock set by the pll so that drm_calc_timestamping_constants() uses the actual clock value on the PLL. E.g., diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index daa4dd3..2a2da82 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1085,6 +1085,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode atombios_crtc_program_ss(rdev, ATOM_ENABLE, radeon_crtc->pll_id, radeon_crtc->crtc_id, &radeon_crtc->ss); } + mode->clock = pll_clock * 10; } static int dce4_crtc_do_set_base(struct drm_crtc *crtc, -- You are receiving this mail because: You are the assignee for the bug. --1396275428.6E6eb2.27816 Date: Mon, 31 Mar 2014 14:17:08 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8"

Comment # 43 on bug 76564 from 
We could also update the adjusted mode clock to the actual clock set by the pll
so that drm_calc_timestamping_constants() uses the actual clock value on the
PLL.  E.g.,

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index daa4dd3..2a2da82 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1085,6 +1085,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc,
struct drm_display_mode
                atombios_crtc_program_ss(rdev, ATOM_ENABLE,
radeon_crtc->pll_id,
                                         radeon_crtc->crtc_id,
&radeon_crtc->ss);
        }
+       mode->clock = pll_clock * 10;
 }

 static int dce4_crtc_do_set_base(struct drm_crtc *crtc,

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