From: bugzilla-daemon@freedesktop.org
To: dri-devel@lists.freedesktop.org
Subject: [Bug 91278] Tonga GPU lock/reset fail with Unigine Valley
Date: Sun, 11 Oct 2015 16:26:58 +0000 [thread overview]
Message-ID: <bug-91278-502-iDgy8WXSNF@http.bugs.freedesktop.org/> (raw)
In-Reply-To: <bug-91278-502@http.bugs.freedesktop.org/>
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https://bugs.freedesktop.org/show_bug.cgi?id=91278
--- Comment #35 from Christian König <deathsimple@vodafone.de> ---
The ring and IB are just normal system memory made accessible to the GPU. So
it's perfectly fine that it's mapped WC by the CPU.
The processing of the commands written into the ring and IB are triggered by
writing the wptr register.
See radeon_ring_set_wptr().
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next prev parent reply other threads:[~2015-10-11 16:26 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-09 10:10 [Bug 91278] Tonga GPU lock/reset fail with Unigine Valley bugzilla-daemon
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