From: bugzilla-daemon@freedesktop.org
To: dri-devel@lists.freedesktop.org
Subject: [Bug 91749] Tonga IH ring misaligned
Date: Tue, 25 Aug 2015 01:18:08 +0000 [thread overview]
Message-ID: <bug-91749-502@http.bugs.freedesktop.org/> (raw)
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https://bugs.freedesktop.org/show_bug.cgi?id=91749
Bug ID: 91749
Summary: Tonga IH ring misaligned
Product: DRI
Version: DRI git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
Component: DRM/AMDgpu
Assignee: dri-devel@lists.freedesktop.org
Reporter: jay@jcornwall.me
>From amdgpu_ih.c:
adev->irq.ih.ring = kzalloc(adev->irq.ih.ring_size + 8, GFP_KERNEL);
if (adev->irq.ih.ring == NULL)
return -ENOMEM;
adev->irq.ih.rb_dma_addr = pci_map_single(adev->pdev,
(void *)adev->irq.ih.ring,
adev->irq.ih.ring_size,
PCI_DMA_BIDIRECTIONAL);
The Tonga IH_RB_BASE register requires 256B alignment. kzalloc does not
guarantee this, e.g.:
adev->irq.ih.ring: 0xFFFF880835B22148
adev->irq.ih.rb_dma_addr: 0x835B22148
IH_RB_BASE: 0835b221
This causes amdgpu_ih_decode_iv to read ahead of the last written IV, missing
it, when this misalignment occurs.
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next reply other threads:[~2015-08-25 1:18 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-25 1:18 bugzilla-daemon [this message]
2015-08-25 2:53 ` [Bug 91749] Tonga IH ring misaligned bugzilla-daemon
2015-08-25 3:18 ` bugzilla-daemon
2019-10-02 17:03 ` bugzilla-daemon
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