From: bugzilla-daemon@freedesktop.org
To: dri-devel@lists.freedesktop.org
Subject: [Bug 94012] Tonga OpenCL clpeak vm faults
Date: Thu, 31 Mar 2016 15:14:31 +0000 [thread overview]
Message-ID: <bug-94012-502-NbNMnmkTOl@http.bugs.freedesktop.org/> (raw)
In-Reply-To: <bug-94012-502@http.bugs.freedesktop.org/>
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https://bugs.freedesktop.org/show_bug.cgi?id=94012
Andy Furniss <adf.lists@gmail.com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
Status|NEW |RESOLVED
--- Comment #2 from Andy Furniss <adf.lists@gmail.com> ---
fixed by llvm commit
commit d3adac51fcce66e8c79b77299fef9e5f6c4c646e
Author: Tom Stellard <thomas.stellard@amd.com>
Date: Wed Mar 30 16:35:09 2016 +0000
AMDGPU/SI: Enable lanemask tracking in misched
Summary:
This results in higher register usage, but should make it easier for
the compiler to hide latency.
This pass is a prerequisite for some more scheduler improvements, and I
think the increase register usage with this patch is acceptable, because
when combined with the scheduler improvements, the total register usage
will decrease.
shader-db stats:
2382 shaders in 478 tests
Totals:
SGPRS: 48672 -> 49088 (0.85 %)
VGPRS: 34148 -> 34847 (2.05 %)
Code Size: 1285816 -> 1289128 (0.26 %) bytes
LDS: 28 -> 28 (0.00 %) blocks
Scratch: 492544 -> 573440 (16.42 %) bytes per wave
Max Waves: 6856 -> 6846 (-0.15 %)
Wait states: 0 -> 0 (0.00 %)
Depends on D18451
Reviewers: nhaehnle, arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264876
91177308-0d34-0410-b5e6-96231b3b80d8
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prev parent reply other threads:[~2016-03-31 15:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-05 18:29 [Bug 94012] Tonga OpenCL clpeak vm faults bugzilla-daemon
2016-02-05 18:30 ` bugzilla-daemon
2016-03-31 15:14 ` bugzilla-daemon [this message]
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