From mboxrd@z Thu Jan 1 00:00:00 1970
From: bugzilla-daemon@freedesktop.org
Subject: [Bug 96326] Heavy screen flickering in OpenGL apps on R9 390
Date: Mon, 01 Aug 2016 14:04:10 +0000
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Date: Mon, 1 Aug 2016 14:04:10 +0000
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https://bugs.freedesktop.org/show_bug.cgi?id=3D96326
--- Comment #8 from Jan Ziak <0xe2.0x9a.0x9b@gmail.com> ---
(In reply to Alex Deucher from comment #7)
> (In reply to Jan Ziak from comment #6)
> > (In reply to Alex Deucher from comment #3)
> > > Please attach your xorg log and dmesg output.
> >=20
> > Upstream Linux kernel does not support variable mclk on R9 390. I enabl=
ed
> > variable mclk by patching some code in drivers/gpu/drm/amd/amdgpu/ (mos=
tly
> > ci_dpm.c).
>=20
> What patch(es) did you use?
I added a function based on ci_dpm_force_state_mclk() in ci_dpm.c.
mask is 0x3.
----
static int ci_dpm_force_state_mclk_mask(struct amdgpu_device *adev, u32 mas=
k) {
struct ci_power_info *pi =3D ci_get_pi(adev);
if (!pi->mclk_dpm_key_disabled) {
PPSMC_Result smc_result =3D
amdgpu_ci_send_msg_to_smc_with_parameter(adev,
PPSMC_MSG_MCLKDPM_SetEnabledMask, mask);
printk("[atomsymbol] %s:%d: mask=3D0x%X, ok=3D%d\n", __FUNCTION=
__,
__LINE__, mask, smc_result =3D=3D PPSMC_Result_OK);
if (smc_result !=3D PPSMC_Result_OK)
return -EINVAL;
}
return 0;
}
----
/sys/class/drm/card?/device/power_dpm_force_performance_level is set to "au=
to".
--=20
You are receiving this mail because:
You are the assignee for the bug.=
--14700602500.220daE7A.12707
Date: Mon, 1 Aug 2016 14:04:10 +0000
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Auto-Submitted: auto-generated
Comment=
# 8
on bug 96326<=
/a>
from Jan Ziak
(In reply to Alex Deucher from comment #7)
> (In reply to Jan Ziak from comment #6)
> > (In reply to Alex Deucher from comment #3)
> > > Please attach your xorg log and dmesg output.
> >=20
> > Upstream Linux kernel does not support variable mclk on R9 390. I=
enabled
> > variable mclk by patching some code in drivers/gpu/drm/amd/amdgpu=
/ (mostly
> > ci_dpm.c).
>=20
> What patch(es) did you use?
I added a function based on ci_dpm_force_state_mclk() in ci_dpm.c.
mask is 0x3.
----
static int ci_dpm_force_state_mclk_mask(struct amdgpu_device *adev, u32 mas=
k) {
struct ci_power_info *pi =3D ci_get_pi(adev);
if (!pi->mclk_dpm_key_disabled) {
PPSMC_Result smc_result =3D
amdgpu_ci_send_msg_to_smc_with_parameter(adev,
PPSMC_MSG_MCLKDPM_SetEnabledMask, mask);
printk("[atomsymbol] %s:%d: mask=3D0x%X, ok=3D%d\n", =
__FUNCTION__,
__LINE__, mask, smc_result =3D=3D PPSMC_Result_OK);
if (smc_result !=3D PPSMC_Result_OK)
return -EINVAL;
}
return 0;
}
----
/sys/class/drm/card?/device/power_dpm_force_performance_level is set to &qu=
ot;auto".
You are receiving this mail because:
- You are the assignee for the bug.
=
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