From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@freedesktop.org Subject: [Bug 97305] Wrong values returned by GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT & GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT randomly breaks stuff Date: Thu, 11 Aug 2016 20:30:54 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0498285528==" Return-path: Received: from culpepper.freedesktop.org (culpepper.freedesktop.org [131.252.210.165]) by gabe.freedesktop.org (Postfix) with ESMTP id C8F406E1BA for ; Thu, 11 Aug 2016 20:30:53 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============0498285528== Content-Type: multipart/alternative; boundary="14709474530.7B81.24069"; charset="UTF-8" --14709474530.7B81.24069 Date: Thu, 11 Aug 2016 20:30:53 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://bugs.freedesktop.org/ Auto-Submitted: auto-generated https://bugs.freedesktop.org/show_bug.cgi?id=3D97305 --- Comment #3 from Matias N. Goldberg --- >> BEGIN PATCH diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 88f4f20..6a2d5bc 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -363,10 +363,11 @@ static int si_get_param(struct pipe_screen* pscreen, = enum pipe_cap param) case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: + return 256; case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: return 4; case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: - return HAVE_LLVM >=3D 0x0309 ? 4 : 0; + return HAVE_LLVM >=3D 0x0309 ? 256 : 0; case PIPE_CAP_GLSL_FEATURE_LEVEL: if (pscreen->get_shader_param(pscreen, PIPE_SHADER_COMPUTE, << END PATCH I'm playing safe by going with 256 bytes with everyone, based on the overwhelming amount of reports (on the left top there's a dropdown, select "All"); unless someone wants to go through the trouble of identifying each card. Even in DX12 256 alignment is by spec: http://delphigl.de/glcapsviewer/gl_stats_caps_single.php?listreportsbycap= =3DGL_UNIFORM_BUFFER_OFFSET_ALIGNMENT http://delphigl.de/glcapsviewer/gl_stats_caps_single.php?listreportsbycap= =3DGL_TEXTURE_BUFFER_OFFSET_ALIGNMENT http://delphigl.de/glcapsviewer/gl_stats_caps_single.php?listreportsbycap= =3DGL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT I believe this patch could potentially increase radeonsi's compatibility greatly and should be tested against popular game titles. --=20 You are receiving this mail because: You are the assignee for the bug.= --14709474530.7B81.24069 Date: Thu, 11 Aug 2016 20:30:53 +0000 MIME-Version: 1.0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://bugs.freedesktop.org/ Auto-Submitted: auto-generated

Comment= # 3 on bug 97305<= /a> from Matias N. Goldberg

>> BEGIN PATCH

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 88f4f20..6a2d5bc 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -363,10 +363,11 @@ static int si_get_param(struct pipe_s=
creen* pscreen, enum
pipe_cap param)

        case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
        case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
+               return 256;
        case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
                return 4;
        case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
-               return HAVE_LLVM >=3D 0x0309 ? 4 : 0;
+               return HAVE_LLVM >=3D 0x0309 ? 256 : 0;

        case PIPE_CAP_GLSL_FEATURE_LEVEL:
                if (pscreen->get_shader_param(pscreen, PIPE_SHADER_COMPU=
TE,

<< END PATCH


I'm playing safe by going with 256 bytes with everyone, based on the
overwhelming amount of reports (on the left top there's a dropdown, select
"All"); unless someone wants to go through the trouble of identif=
ying each
card. Even in DX12 256 alignment is by spec:
http://delphigl.de/glcapsvi=
ewer/gl_stats_caps_single.php?listreportsbycap=3DGL_UNIFORM_BUFFER_OFFSET_A=
LIGNMENT
http://delphigl.de/glcapsvi=
ewer/gl_stats_caps_single.php?listreportsbycap=3DGL_TEXTURE_BUFFER_OFFSET_A=
LIGNMENT
http://delphigl.de/g=
lcapsviewer/gl_stats_caps_single.php?listreportsbycap=3DGL_SHADER_STORAGE_B=
UFFER_OFFSET_ALIGNMENT

I believe this patch could potentially increase radeonsi's compatibility
greatly and should be tested against popular game titles.

You are receiving this mail because:

You are the assignee for the bug.

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