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From: Alistair Popple <apopple@nvidia.com>
To: Timur Tabi <ttabi@nvidia.com>
Cc: "dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	 Alexandre Courbot <acourbot@nvidia.com>,
	"dakr@kernel.org" <dakr@kernel.org>,
	 "lossin@kernel.org" <lossin@kernel.org>,
	"ojeda@kernel.org" <ojeda@kernel.org>,
	"boqun.feng@gmail.com" <boqun.feng@gmail.com>,
	"a.hindborg@kernel.org" <a.hindborg@kernel.org>,
	 "tzimmermann@suse.de" <tzimmermann@suse.de>,
	"tmgross@umich.edu" <tmgross@umich.edu>,
	 "alex.gaynor@gmail.com" <alex.gaynor@gmail.com>,
	"simona@ffwll.ch" <simona@ffwll.ch>,
	 "mripard@kernel.org" <mripard@kernel.org>,
	 "maarten.lankhorst@linux.intel.com"
	<maarten.lankhorst@linux.intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	 John Hubbard <jhubbard@nvidia.com>,
	"nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>,
	 "bjorn3_gh@protonmail.com" <bjorn3_gh@protonmail.com>,
	"airlied@gmail.com" <airlied@gmail.com>,
	 "aliceryhl@google.com" <aliceryhl@google.com>,
	Joel Fernandes <joelagnelf@nvidia.com>,
	 "gary@garyguo.net" <gary@garyguo.net>
Subject: Re: [PATCH 08/10] gpu: nova-core: falcon: Add support to check if RISC-V is active
Date: Tue, 2 Sep 2025 10:08:57 +1000	[thread overview]
Message-ID: <efob3ohi7d4em2sjvxm7bfusqvalrbhu2xi4c2gwpwhpuvrrah@n2x654p4ydzw> (raw)
In-Reply-To: <ed0e4a38be11a954338cafcafca66f6dbf015ce6.camel@nvidia.com>

On 2025-08-30 at 04:48 +1000, Timur Tabi <ttabi@nvidia.com> wrote...
> On Wed, 2025-08-27 at 18:20 +1000, Alistair Popple wrote:
> > +    pub(crate) fn is_riscv_active(&self, bar: &Bar0) -> Result<bool> {
> > +        let cpuctl = regs::NV_PRISCV_RISCV_CPUCTL::read(bar, &E::ID);
> > +        Ok(cpuctl.active_stat())
> > +    }
> 
> I think this should return just bool instead of Result<bool>

Agreed. And looking at some of the other sequencer/falcon code in Joel's series
I believe similar comments apply there. I assume something changed with the
register reading code to make this possible.

  reply	other threads:[~2025-09-02  0:09 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-27  8:19 [PATCH 00/10] gpu: nova-core: Boot GSP to RISC-V active Alistair Popple
2025-08-27  8:19 ` [PATCH 01/10] gpu: nova-core: Set correct DMA mask Alistair Popple
2025-08-29 23:55   ` John Hubbard
2025-09-01 23:55     ` Alistair Popple
2025-09-03 19:45       ` John Hubbard
2025-09-03 22:03         ` Alistair Popple
2025-08-27  8:19 ` [PATCH 02/10] gpu: nova-core: Create initial GspSharedMemObjects Alistair Popple
2025-08-27  8:20 ` [PATCH 03/10] gpu: nova-core: gsp: Create wpr metadata Alistair Popple
2025-09-01  7:46   ` Alexandre Courbot
2025-09-03  8:57     ` Alistair Popple
2025-09-03 12:51       ` Alexandre Courbot
2025-09-03 13:10         ` Alexandre Courbot
2025-08-27  8:20 ` [PATCH 04/10] gpu: nova-core: Add a slice-buffer (sbuffer) datastructure Alistair Popple
2025-08-27  8:20 ` [PATCH 05/10] gpu: nova-core: gsp: Add GSP command queue handling Alistair Popple
2025-08-27 20:35   ` John Hubbard
2025-08-27 23:42     ` Alistair Popple
2025-08-27  8:20 ` [PATCH 06/10] gpu: nova-core: gsp: Create rmargs Alistair Popple
2025-08-27  8:20 ` [PATCH 07/10] gpu: nova-core: gsp: Create RM registry and sysinfo commands Alistair Popple
2025-08-29  6:02   ` Alistair Popple
2025-08-27  8:20 ` [PATCH 08/10] gpu: nova-core: falcon: Add support to check if RISC-V is active Alistair Popple
2025-08-29 18:48   ` Timur Tabi
2025-09-02  0:08     ` Alistair Popple [this message]
2025-08-27  8:20 ` [PATCH 09/10] gpu: nova-core: falcon: Add support to write firmware version Alistair Popple
2025-08-27  8:20 ` [PATCH 10/10] gpu: nova-core: gsp: Boot GSP Alistair Popple
2025-08-28  8:37 ` [PATCH 00/10] gpu: nova-core: Boot GSP to RISC-V active Miguel Ojeda
2025-08-29  3:03   ` Alexandre Courbot
2025-08-29  7:40     ` Danilo Krummrich
2025-08-29 10:01       ` Miguel Ojeda
2025-08-29 13:47         ` Alexandre Courbot

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