Re: [PATCH v2 5/5] drm/msm: Convert map helper to use dma-address

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [Critical] drm/msm: __do_map() uses sg_dma_address() as CPU physical address
- [High] drm/msm: double dma_map_sgtable() and unmap in get_pages() and put_pages()
- [High] drm/msm: NULL deref in get_pages() via drm_prime_gem_destroy() on error
- [High] drm/msm: missing IOTLB invalidation in __unmap_iommu() and msm_iommu_map()
--

commit e639a62aaac331070fa9f9ceece15e985cb308ad
Author: Rob Clark <robin.clark@oss.qualcomm.com>

drm/msm: Convert map helper to use dma-address

This series updates the MSM DRM driver to DMA-map GEM scatter-gather tables
and converts the IOMMU and page table mapping helpers to iterate over DMA
addresses and lengths rather than struct page pointers.

> diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
> index 130ae27ee00be..72e3cd8bb1e7c 100644
> --- a/drivers/gpu/drm/msm/msm_gem.c
> +++ b/drivers/gpu/drm/msm/msm_gem.c
> @@ -190,6 +190,7 @@ static void update_lru(struct drm_gem_object *obj)
>  static struct page **get_pages(struct drm_gem_object *obj)
>  {
>  	struct msm_gem_object *msm_obj = to_msm_bo(obj);
> +	int ret = 0;
>  
>  	msm_gem_assert_locked(obj);
>  
> @@ -209,19 +210,26 @@ static struct page **get_pages(struct drm_gem_object *obj)
>  			return p;
>  		}
>  
> -		update_device_mem(dev->dev_private, obj->size);
> -
>  		msm_obj->pages = p;
>  
>  		msm_obj->sgt = drm_prime_pages_to_sg(obj->dev, p, npages);
>  		if (IS_ERR(msm_obj->sgt)) {
> -			void *ptr = ERR_CAST(msm_obj->sgt);
> -
>  			DRM_DEV_ERROR(dev->dev, "failed to allocate sgt\n");
> -			msm_obj->sgt = NULL;
> -			return ptr;
> +			ret = PTR_ERR(msm_obj->sgt);
> +			goto error;
>  		}
>  
> +		ret = dma_map_sgtable(drm_dev_dma_dev(obj->dev),
> +				      msm_obj->sgt,
> +				      DMA_BIDIRECTIONAL,
> +				      DMA_ATTR_SKIP_CPU_SYNC);
> +		if (ret) {
> +			DRM_DEV_ERROR(dev->dev, "could not map sgtable: %d\n", ret);
> +			goto error;
> +		}
> +
> +		update_device_mem(dev->dev_private, obj->size);
> +
>  		/* For non-cached buffers, ensure the new pages are clean
>  		 * because display controller, GPU, etc. are not coherent:
>  		 */
> @@ -232,6 +240,16 @@ static struct page **get_pages(struct drm_gem_object *obj)
>  	}
>  
>  	return msm_obj->pages;
> +
> +error:
> +	if (!IS_ERR(msm_obj->sgt))
> +		drm_prime_gem_destroy(obj, msm_obj->sgt);

[Severity: High]
Won't calling drm_prime_gem_destroy() in the error path of get_pages() cause a
NULL pointer dereference when dma_map_sgtable() fails?

In drivers/gpu/drm/msm/msm_gem.c, get_pages() is only used for non-imported
GEM objects and rejects imported objects at the start:

    if (drm_WARN_ON_ONCE(obj->dev, drm_gem_is_imported(obj)))
        return ERR_PTR(-EINVAL);

Because obj->import_attach is NULL for native GEM objects, jumping to error
after drm_prime_pages_to_sg() succeeds calls drm_prime_gem_destroy(), which
dereferences attach->dmabuf:

    attach = obj->import_attach;
    if (sg)
        dma_buf_unmap_attachment_unlocked(attach, sg, DMA_BIDIRECTIONAL);
    dma_buf = attach->dmabuf;

Should this error path call sg_free_table(msm_obj->sgt) and
kfree(msm_obj->sgt) instead of drm_prime_gem_destroy()?

> +	msm_obj->sgt = NULL;
> +
> +	drm_gem_put_pages(obj, msm_obj->pages, false, false);
> +	msm_obj->pages = NULL;
> +
> +	return ERR_PTR(ret);
>  }
>  
>  static void put_pages(struct drm_gem_object *obj)
> @@ -246,18 +264,21 @@ static void put_pages(struct drm_gem_object *obj)
>  		drm_gpuvm_bo_gem_evict(obj, true);
>  
>  	if (msm_obj->pages) {
> -		if (msm_obj->sgt) {
> -			/* For non-cached buffers, ensure the new
> -			 * pages are clean because display controller,
> -			 * GPU, etc. are not coherent:
> -			 */
> -			if (msm_obj->flags & MSM_BO_WC)
> -				sync_for_cpu(msm_obj);
> +		/* For non-cached buffers, ensure the new
> +		 * pages are clean because display controller,
> +		 * GPU, etc. are not coherent:
> +		 */
> +		if (msm_obj->flags & MSM_BO_WC)
> +			sync_for_cpu(msm_obj);
>  
> -			sg_free_table(msm_obj->sgt);
> -			kfree(msm_obj->sgt);
> -			msm_obj->sgt = NULL;
> -		}
> +		dma_unmap_sgtable(drm_dev_dma_dev(obj->dev),
> +				  msm_obj->sgt,
> +				  DMA_BIDIRECTIONAL,
> +				  DMA_ATTR_SKIP_CPU_SYNC);

[Severity: High]
Doesn't this map msm_obj->sgt twice in get_pages() and unmap it twice in
put_pages() whenever MSM_BO_WC is set?

In get_pages(), dma_map_sgtable() is called with DMA_ATTR_SKIP_CPU_SYNC, and
then if (msm_obj->flags & MSM_BO_WC) is true, sync_for_device() is called:

    static void sync_for_device(struct msm_gem_object *msm_obj)
    {
        struct device *dev = msm_obj->base.dev->dev;

        dma_map_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0);
    }

Symmetrically, in put_pages(), sync_for_cpu() calls dma_unmap_sgtable(dev,
msm_obj->sgt, DMA_BIDIRECTIONAL, 0), followed immediately by a second
dma_unmap_sgtable() with DMA_ATTR_SKIP_CPU_SYNC on the same sg_table and
device.

With CONFIG_DMA_API_DEBUG enabled, mapping an already-mapped scatterlist
triggers overlapping DMA-API debug warnings in debug_dma_map_sg() and
double-unmap warnings in debug_dma_unmap_sg(). Additionally, if
use_dma_iommu(dev) is true, the second dma_map_sgtable() overwrites
sg_dma_address(sg) and leaks the first IOVA range in group->default_domain,
while the second dma_unmap_sgtable() frees the second IOVA range twice in
iommu_dma_unmap_sg().

> diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
> index da6782fca6bd2..6258c942e66ad 100644
> --- a/drivers/gpu/drm/msm/msm_iommu.c
> +++ b/drivers/gpu/drm/msm/msm_iommu.c
[ ... ]
> @@ -135,6 +137,83 @@ static int msm_iommu_pagetable_unmap(struct msm_mmu *mmu, u64 iova, size_t size)
>  		size -= unmapped;
>  	}
>  
> +	return ret;
> +}
> +
> +static inline int
> +__do_map(unsigned long pgsize_bitmap, u64 iova, struct sg_table *sgt, size_t off,
> +	 size_t len, int prot, void *arg, map_fn map, unmap_fn unmap)
> +{
> +	struct scatterlist *sg;
> +	u64 addr = iova;
> +	unsigned int i;
> +
> +	for_each_sgtable_dma_sg (sgt, sg, i) {
> +		size_t size = sg_dma_len(sg);
> +		phys_addr_t phys = sg_dma_address(sg);

[Severity: Critical]
Is it safe to treat sg_dma_address(sg) and sg_dma_len(sg) as CPU physical
addresses and physical segment lengths when programming the GPU and display
page tables in __do_map()?

Both __map_pgtable() (calling io_pgtable_ops->map_pages()) and __map_iommu()
(calling iommu_domain->ops->map_pages()) expect paddr to be a CPU physical
address.

In get_pages() and drm_gem_prime_import(), the sg_table is DMA-mapped for
drm_dev_dma_dev(obj->dev) (which is obj->dev->dev). As noted in the comment
above sync_for_device() in drivers/gpu/drm/msm/msm_gem.c and in
msm_kms_init_vm() in drivers/gpu/drm/msm/msm_kms.c, depending on the display
generation, the display IOMMU is wired either to the parent mdss device or
directly to the mdp sub-node (obj->dev->dev):

    if (device_iommu_mapped(mdp_dev))
        iommu_dev = mdp_dev;
    else if (mdss_dev && device_iommu_mapped(mdss_dev))
        iommu_dev = mdss_dev;

On platforms where the IOMMU is wired to the mdp node and the IOMMU driver
does not select IOMMU_DOMAIN_IDENTITY as the default domain (such as SDM630 /
SDM660 with "qcom,mdp5", MSM8996, and platforms using qcom_iommu), the IOMMU
core allocates a DMA default_domain during probe and calls
iommu_setup_dma_ops(), setting use_dma_iommu(dev) to true.

Even when msm_iommu_new() later attaches an unmanaged domain via
iommu_attach_device(), use_dma_iommu(dev) remains true. In
kernel/dma/mapping.c, dma_go_direct() checks use_dma_iommu(dev) before !ops:

    static bool dma_go_direct(struct device *dev, dma_addr_t mask,
            const struct dma_map_ops *ops)
    {
        if (use_dma_iommu(dev))
            return false;

        if (likely(!ops))
            return true;

As a result, dma_map_sgtable() calls iommu_dma_map_sg(), which allocates a
virtual IOVA in group->default_domain, coalesces physically non-contiguous
segments into contiguous IOVA ranges, and writes that virtual IOVA into
sg_dma_address(sg) and the coalesced length into sg_dma_len(sg). Passing those
values to __do_map() will program the GPU and display page tables with virtual
IOVAs instead of physical addresses.

[ ... ]
> @@ -684,12 +731,27 @@ static void msm_iommu_detach(struct msm_mmu *mmu)
>  	iommu_detach_device(iommu->domain, mmu->dev);
>  }
>  
> +static size_t
> +__unmap_iommu(void *arg, u64 iova, size_t pgsize, size_t pgcount)
> +{
> +	struct iommu_domain *domain = arg;
> +	return domain->ops->unmap_pages(domain, iova, pgsize, pgcount, NULL);
> +}
> +
> +static int
> +__map_iommu(void *arg, phys_addr_t paddr, u64 iova, size_t pgsize,
> +	    size_t pgcount, int prot, size_t *mapped)
> +{
> +	struct iommu_domain *domain = arg;
> +	return domain->ops->map_pages(domain, iova, paddr, pgsize, pgcount,
> +				      prot, GFP_KERNEL, mapped);
> +}
> +
>  static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
>  			 struct sg_table *sgt, size_t off, size_t len,
>  			 int prot)
>  {
> -	struct msm_iommu *iommu = to_msm_iommu(mmu);
> -	ssize_t ret;
> +	struct iommu_domain *domain = to_msm_iommu(mmu)->domain;
>  
>  	WARN_ON(off != 0);
>  
> @@ -697,23 +759,23 @@ static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
>  	if (iova & BIT_ULL(48))
>  		iova |= GENMASK_ULL(63, 49);
>  
> -	ret = iommu_map_sgtable(iommu->domain, iova, sgt, prot);
> -	if (ret < 0)
> -		return ret;
> -
> -	return (ret == len) ? 0 : -EINVAL;
> +	return __do_map(domain->pgsize_bitmap, iova, sgt, off, len, prot,
> +			domain, __map_iommu, __unmap_iommu);
>  }
>  
>  static int msm_iommu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)
>  {
> -	struct msm_iommu *iommu = to_msm_iommu(mmu);
> +	struct iommu_domain *domain = to_msm_iommu(mmu)->domain;
> +	int ret;
>  
>  	if (iova & BIT_ULL(48))
>  		iova |= GENMASK_ULL(63, 49);
>  
> -	iommu_unmap(iommu->domain, iova, len);
> +	ret = __do_unmap(domain->pgsize_bitmap, iova, len, domain, __unmap_iommu);
>  
> -	return 0;
> +	iommu_flush_iotlb_all(domain);
> +
> +	return ret;
>  }

[Severity: High]
Can replacing iommu_map_sgtable() and iommu_unmap() with __do_map() and
__do_unmap() leave stale IOTLB entries behind?

There appear to be three cases where IOTLB maintenance is skipped:

1. In msm_iommu_map(), if __do_map() fails after mapping some pages, it rolls
back the partial mapping via __do_unmap(..., __unmap_iommu). Unlike
msm_iommu_pagetable_map(), msm_iommu_map() does not call
iommu_flush_iotlb_all(domain) on error.

2. In __unmap_iommu(), NULL is passed for the struct iommu_iotlb_gather
pointer to domain->ops->unmap_pages(). In drivers/iommu/io-pgtable-arm.c,
__arm_lpae_unmap() only calls io_pgtable_tlb_add_page() when gather is
non-NULL:

    if (gather && !iommu_iotlb_gather_queued(gather))
        io_pgtable_tlb_add_page(data, gather, iova, size);

On SoCs using drivers/iommu/arm/arm-smmu/qcom_iommu.c,
qcom_iommu_flush_iotlb_all() only issues ARM_SMMU_CB_TLBSYNC via
qcom_iommu_tlb_sync() and relies on qcom_iommu_tlb_add_page() issuing
ARM_SMMU_CB_S1_TLBIVAL during unmap_pages(). Passing gather as NULL skips the
TLB invalidation commands altogether.

3. On APQ8064 (drivers/iommu/msm_iommu.c), msm_iommu_ops implements
.iotlb_sync_map = msm_iommu_sync_map while leaving .flush_iotlb_all = NULL, so
calling domain->ops->map_pages() directly in msm_iommu_map() bypasses the
iotlb_sync_map callback that iommu_map_sgtable() previously invoked.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261027152821.51144-1-robin.clark@oss.qualcomm.com?part=5