Re: [PATCH v4 1/4] drm/imagination: Limit access to the MIPS firmware interface

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] drm/imagination: wrong page count check and loop bound in pvr_vm_get_pt_phys_addrs()
- [Low] drm/imagination: mismatched kernel-doc member names in struct pvr_fw_device
--

commit 1c0b6ad7b66c2f99b867a56a6bc1405d6e8aad70
Author: Alessio Belle <alessio.belle@imgtec.com>

drm/imagination: Limit access to the MIPS firmware interface

This commit splits struct pvr_fw_mips_data into separate structures for the
main MIPS firmware logic and the MIPS VM logic, removes pvr_fw_mips.h, and
adds pvr_vm_get_pt_phys_addrs() to retrieve the physical addresses of the
MIPS firmware page table.

> diff --git a/drivers/gpu/drm/imagination/pvr_fw.h b/drivers/gpu/drm/imagination/pvr_fw.h
> index 4b25291135b69..0d4507f55c84b 100644
> --- a/drivers/gpu/drm/imagination/pvr_fw.h
> +++ b/drivers/gpu/drm/imagination/pvr_fw.h
> @@ -310,10 +310,15 @@ struct pvr_fw_device {
>  	/** @funcs: Function table for the FW processor used by this device. */
>  	const struct pvr_fw_defs *defs;
>  
> -	/** @processor_data: Pointer to data specific to FW processor. */
> +	/** @processor_data: Data specific to FW processor. */
>  	union {
> -		/** @mips_data: Pointer to MIPS-specific data. */
> -		struct pvr_fw_mips_data *mips_data;
> +		/** @mips_data: MIPS-specific data. */
> +		struct {
> +			/** @mips_fw_data: Pointer to MIPS-FW-specific data. */
> +			struct pvr_fw_mips_data *fw_data;
> +			/** @mips_vm_data: Pointer to MIPS-VM-specific data. */
> +			struct pvr_vm_mips_data *vm_data;
> +		} mips_data;

[Severity: Low]
This isn't a bug, but in struct pvr_fw_device in
drivers/gpu/drm/imagination/pvr_fw.h, should the kernel-doc tags
@mips_fw_data and @mips_vm_data be @fw_data and @vm_data to match the struct
member names?

> diff --git a/drivers/gpu/drm/imagination/pvr_vm_mips.c b/drivers/gpu/drm/imagination/pvr_vm_mips.c
> index 5847a1c92bea8..264ea0fccf9c1 100644
> --- a/drivers/gpu/drm/imagination/pvr_vm_mips.c
> +++ b/drivers/gpu/drm/imagination/pvr_vm_mips.c
> @@ -16,6 +17,31 @@
>  #include <linux/types.h>
>  #include <linux/vmalloc.h>
>  
> +#define PVR_MIPS_PT_PAGE_COUNT \
> +	DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)
> +
> +/**
> + * struct pvr_vm_mips_data - MIPS-VM-specific data
> + */
> +struct pvr_vm_mips_data {
> +	/**
> +	 * @pt_pages: Pages containing MIPS pagetable.
> +	 */
> +	struct page *pt_pages[PVR_MIPS_PT_PAGE_COUNT];
> +
> +	/** @pt: Pointer to CPU mapping of MIPS pagetable. */
> +	u32 *pt;
> +
> +	/** @pt_dma_addr: DMA mappings of MIPS pagetable. */
> +	dma_addr_t pt_dma_addr[PVR_MIPS_PT_PAGE_COUNT];

[ ... ]

> @@ -230,8 +256,38 @@ pvr_vm_mips_unmap(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj)
>  			    ROGUE_MIPSFW_LOG2_PAGE_SIZE_4K;
>  
>  	for (u32 pfn = start_pfn; pfn < end_pfn; pfn++)
> -		WRITE_ONCE(mips_data->pt[pfn], 0);
> +		WRITE_ONCE(vm_data->pt[pfn], 0);
>  
>  	pvr_mmu_flush_request_all(pvr_dev);
>  	WARN_ON(pvr_mmu_flush_exec(pvr_dev, true));
>  }
> +
> +/**
> + * pvr_vm_get_pt_phys_addrs() - Acquire the physical addresses of the MIPS FW page table pages
> + * @pvr_dev: Target PowerVR device.
> + * @phys_addrs: Output array for physical addresses of MIPS FW page table pages.
> + * @max_num_addrs: Maximum number of addresses that can be written to @phys_addrs.
> + *
> + * Returns:
> + *  * 0 on success, or
> + *  * -%EINVAL if @phys_addrs cannot accommodate all MIPS FW page table pages.
> + */
> +int
> +pvr_vm_get_pt_phys_addrs(struct pvr_device *pvr_dev, u64 *phys_addrs, int max_num_addrs)
> +{
> +	struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;
> +	struct pvr_vm_mips_data *vm_data = fw_dev->processor_data.mips_data.vm_data;
> +
> +	if (ARRAY_SIZE(vm_data->pt_pages) > max_num_addrs)
> +		return -EINVAL;
> +
> +	for (u32 page_nr = 0; page_nr < max_num_addrs; page_nr++) {
> +		/* Firmware expects 4k pages, but host page size might be different. */
> +		u32 src_page_nr = (page_nr * ROGUE_MIPSFW_PAGE_SIZE_4K) >> PAGE_SHIFT;
> +		u32 page_offset = (page_nr * ROGUE_MIPSFW_PAGE_SIZE_4K) & ~PAGE_MASK;
> +
> +		phys_addrs[page_nr] = vm_data->pt_dma_addr[src_page_nr] + page_offset;
> +	}
> +
> +	return 0;
> +}

[Severity: Medium]
In pvr_vm_get_pt_phys_addrs() in drivers/gpu/drm/imagination/pvr_vm_mips.c
(and its declaration in drivers/gpu/drm/imagination/pvr_vm_mips.h), should
the size check and loop bound use ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES
instead of ARRAY_SIZE(vm_data->pt_pages) and max_num_addrs, and should
max_num_addrs be an unsigned type such as u32?

vm_data->pt_pages and vm_data->pt_dma_addr are sized to
PVR_MIPS_PT_PAGE_COUNT, which is the number of host PAGE_SIZE pages (for
example, 1 on 16K or 64K page hosts), whereas phys_addrs is populated with
4K MIPS firmware page table addresses
(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES = 4).

Checking ARRAY_SIZE(vm_data->pt_pages) > max_num_addrs validates against the
host page count rather than ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES, so on 16K
or 64K page hosts a buffer with fewer than 4 entries would pass the check.

Additionally, iterating page_nr up to max_num_addrs rather than
ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES means that if a caller passes
max_num_addrs > ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES, src_page_nr will index
past the end of vm_data->pt_dma_addr[]. Because max_num_addrs is a signed int
compared against unsigned ARRAY_SIZE() and u32 page_nr, this also triggers
-Wsign-compare warnings and allows negative values to bypass the check.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261029-b4-simplify-mips-pte-defs-v4-0-9656041e040b@imgtec.com?part=1