[PATCH 15/15] PCI/TSM: Add relative MMIO offset support?

[Dan Williams <djbw@kernel.org>]

The RMM specification, DEN0137-2.0-bet2 section A9.6.2 "Realm validation of
device memory mappings" documents the expectation that the
MMIO_REPORTING_OFFSET chosen for TDISP Interface Reports is always BAR
aligned.

Ideally this change is not needed and all implementations share the same
expectation.

If this semantic is already shipping in production and/or the PCI-SIG
clarifies that an implementation can hold this assumption then Linux will
need to ask the TSM drivers for this hint.

Cc: Alexey Kardashevskiy <aik@amd.com>
Cc: Xu Yilun <yilun.xu@linux.intel.com>
Cc: "Aneesh Kumar K.V" <aneesh.kumar@kernel.org>
Signed-off-by: Dan Williams <djbw@kernel.org>
---
 include/linux/pci-tsm.h | 15 ++++++++++++++-
 drivers/pci/tsm/core.c  | 14 ++++++++++----
 2 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/include/linux/pci-tsm.h b/include/linux/pci-tsm.h
index 6d5fadd79360..be9f78ca2c1a 100644
--- a/include/linux/pci-tsm.h
+++ b/include/linux/pci-tsm.h
@@ -296,7 +296,20 @@ struct pci_tsm_devsec *to_pci_tsm_devsec(struct pci_tsm *tsm);
 int pci_tsm_mmio_setup(struct pci_dev *pdev, struct pci_tsm_mmio *mmio);
 void pci_tsm_mmio_teardown(struct pci_tsm_mmio *mmio);
 
-struct pci_tsm_mmio *pci_tsm_mmio_alloc(struct pci_dev *pdev);
+/**
+ * enum tdisp_offset_scheme - MMIO_REPORTING_OFFSET assumptions
+ * @TDISP_OFFSET_BAR_ALIGN: mask by bar size to recover offset
+ * @TDISP_OFFSET_RELATIVE: first mmio report per bar is bar-offset-0
+ *
+ * A TSM driver may know that the default TDISP_OFFSET_BAR_ALIGN
+ * assumption is being violated.
+ */
+enum tdisp_offset_scheme {
+	TDISP_OFFSET_BAR_ALIGN,
+	TDISP_OFFSET_RELATIVE,
+};
+struct pci_tsm_mmio *pci_tsm_mmio_alloc(struct pci_dev *pdev,
+					enum tdisp_offset_scheme scheme);
 int pci_tsm_mmio_free(struct pci_dev *pdev, struct pci_tsm_mmio *mmio);
 #else
 static inline int pci_tsm_register(struct tsm_dev *tsm_dev)
diff --git a/drivers/pci/tsm/core.c b/drivers/pci/tsm/core.c
index 9ac216ad896d..19ad35f2da4a 100644
--- a/drivers/pci/tsm/core.c
+++ b/drivers/pci/tsm/core.c
@@ -643,13 +643,15 @@ struct pci_tsm_devif_report {
 /**
  * pci_tsm_mmio_alloc() - allocate encrypted MMIO range descriptor
  * @pdev: device owner of MMIO ranges
+ * @scheme: allow the low level TSM driver to hint the offset calc scheme
  *
  * Return: the encrypted MMIO range descriptor on success, NULL on failure
  *
  * Assumes that this is called within the live lifetime of a PCI device's
  * association with a low level TSM.
  */
-struct pci_tsm_mmio *pci_tsm_mmio_alloc(struct pci_dev *pdev)
+struct pci_tsm_mmio *pci_tsm_mmio_alloc(struct pci_dev *pdev,
+					enum tdisp_offset_scheme scheme)
 {
 	struct device_evidence *evidence = pdev->tsm->evidence;
 	u64 reporting_bar_base, last_reporting_end;
@@ -712,10 +714,14 @@ struct pci_tsm_mmio *pci_tsm_mmio_alloc(struct pci_dev *pdev)
 			last_bar = bar;
 
 			/*
-			 * Determine the obfuscated base of the BAR. BAR
-			 * offsets are never obfuscated.
+			 * Either the first range per bar always maps
+			 * the start of the BAR, or the reporting_offset
+			 * is BAR size aligned.
 			 */
-			reporting_bar_base = tsm_offset & ~mask;
+			if (scheme == TDISP_OFFSET_RELATIVE)
+				reporting_bar_base = tsm_offset;
+			else
+				reporting_bar_base = tsm_offset & ~mask;
 		} else if (tsm_offset < last_reporting_end) {
 			pci_dbg(pdev, "Reporting ranges within BAR not in ascending order\n");
 			return NULL;
-- 
2.54.0